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ATmega16U4 Datasheet(PDF) 309 Page - ATMEL Corporation |
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ATmega16U4 Datasheet(HTML) 309 Page - ATMEL Corporation |
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309 / 408 page ![]() 309 7766D–AVR–01/09 ATmega16U4/ATmega32U4 (ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external reference voltage is being applied to the AREF pin. • Bit 5 – ADLAR: ADC Left Adjust Result The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register. Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver- sions. For a complete description of this bit, see “The ADC Data Register – ADCL and ADCH” on page 312. • Bits 4:0 – MUX4:0: Analog Channel Selection Bits The value of these bits selects which combination of analog inputs are connected to the ADC. These bits also select the gain for the differential channels. See Table 24-4 for details. If these bits are changed during a conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSRA is set). Table 24-3. Voltage Reference Selections for ADC REFS1 REFS0 Voltage Reference Selection 0 0 AREF, Internal Vref turned off 01 AVCC with external capacitor on AREF pin 10 Reserved 1 1 Internal 2.56V Voltage Reference with external capacitor on AREF pin Table 24-4. Input Channel and Gain Selections MUX5..0(1) Single Ended Input Positive Differential Input Negative Differential Input Gain 000000 ADC0 N/A 000001 ADC1 000010 N/A 000011 000100 ADC4 000101 ADC5 000110 ADC6 000111 ADC7 001000 N/A N/A N/A N/A 001001 ADC1 ADC0 10x 001010 N/A N/A N/A 001011 ADC1 ADC0 200x 001100 N/A 001101 001110 001111 010000 ADC0 ADC1 1x |
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