ATmega16A datasheet(297/352 Pages) ATMEL

297 / 352 page

297

8154B–AVR–07/09

ATmega16A

2. VBOT may be below nominal minimum operating voltage for some devices. For devices where

this is the case, the device is tested down to V

CC = VBOT during the production test. This guar-

antees that a Brown-out Reset will occur before V

CC drops to a voltage where correct

operation of the microcontroller is no longer guaranteed. The test is performed using

BODLEVEL = 1 and BODLEVEL = 0 for ATmega16A.

27.6

External Interrupts Characteristics

27.7

Two-wire Serial Interface Characteristics

Table 27-4 describes the requirements for devices connected to the Two-wire Serial Bus. The ATmega16A Two-wire Serial

Interface meets or exceeds these requirements under the noted conditions.

Timing symbols refer to Figure 27-4.

Table 27-3.

Asynchronous External Interrupt Characteristics

Symbol

Parameter

Condition

Min

Typ

Max

Units

tINT

Minimum pulse width for asynchronous

external interrupt

Table 27-4.

Two-wire Serial Bus Requirements

Symbol

Parameter

Condition

Min

Max

Units

VIL

Input Low-voltage

-0.5

0.3 VCC

Input High-voltage

0.7 V

CC + 0.5

Vhys

(1)

Hysteresis of Schmitt Trigger Inputs

0.05 VCC

(2)

–V

(1)

Output Low-voltage

3 mA sink current

0.4

(1)

Rise Time for both SDA and SCL

20 + 0.1C

(3)(2)

300

tof

(1)

Output Fall Time from VIHmin to VILmax

10 pF < Cb < 400 pF

(3)

20 + 0.1Cb

(3)(2)

250

(1)

Spikes Suppressed by Input Filter

50(2)

Input Current each I/O Pin

0.1V

CC < Vi < 0.9VCC

-10

µA

(1)

Capacitance for each I/O Pin

–

SCL

SCL Clock Frequency

(4) > max(16f

SCL, 250kHz)

(5)

400

kHz

Value of Pull-up resistor

SCL ≤ 100 kHz

SCL > 100 kHz

HD;STA

Hold Time (repeated) START Condition

SCL ≤ 100 kHz

4.0

–

µs

fSCL > 100 kHz

0.6

–

µs

tLOW

Low Period of the SCL Clock

SCL ≤ 100 kHz

(6)

4.7

–

µs

SCL > 100 kHz

(7)

1.3

–

µs

tHIGH

High period of the SCL clock

fSCL ≤ 100 kHz

4.0

–

µs

SCL > 100 kHz

0.6

–

µs

SU;STA

Set-up time for a repeated START condition

fSCL ≤ 100 kHz

4.7

–

µs

fSCL > 100 kHz

0.6

–

µs

VCC 0,4V

–

3mA

----------------------------

1000ns

-------------------

VCC 0,4V

–

3mA

----------------------------

300ns

----------------

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