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ATA8205 Datasheet(PDF) 13 Page - ATMEL Corporation |
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ATA8205 Datasheet(HTML) 13 Page - ATMEL Corporation |
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13 / 46 page ![]() 13 9121B–INDCO–04/09 ATA8203/ATA8204/ATA8205 8.2 Bit-check Mode In bit-check mode the incoming data stream is examined to distinguish between a valid signal from a corresponding transmitter and signals due to noise. This is done by subsequent time frame checks where the distances between 2 signal edges are continuously compared to a pro- grammable time window. The maximum number of these edge-to-edge tests, before the receiver switches to receiving mode, is also programmable. 8.3 Configuring the Bit Check Assuming a modulation scheme that contains two edges per bit, two time frame checks verify one bit. This is valid for Manchester, Bi-phase, and most other modulation schemes. The maxi- mum count of bits to be checked can be set to 0, 3, 6, or 9 bits using the variable N Bit-check in the OPMODE register. This implies 0, 6, 12, and 18 edge-to-edge checks respectively. If N Bit-check is set to a higher value, the receiver is less likely to switch to receiving mode due to noise. In the presence of a valid transmitter signal, the bit check takes less time if N Bit-check is set to a lower value. In polling mode, the bit-check time is not dependent on NBit-check. Figure 8-2 shows an example where three bits are tested successfully and the data signal is transferred to pin DATA. Figure 8-2. Timing Diagram for Complete Successful Bit Check According to Figure 8-3, the time window for the bit check is defined by two separate time limits. If the edge-to-edge time t ee is in between the lower bit-check limit TLim_min and the upper bit-check limit T Lim_max, the check continues. If tee is smaller than TLim_min or tee exceeds TLim_max, the bit check is terminated and the receiver switches to sleep mode. Figure 8-3. Valid Time Window for Bit Check IC_ACTIVE Data_out (DATA) Dem_out Bit check T Bit-check Start-up mode (Number of checked Bits: 3) Bit check ok 1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit 1/2 Bit Start-check mode Receiving mode T Start-up 1/fSig tee TLim_max TLim_min Dem_out |
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