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DS1306 Datasheet(PDF) 11 Page - Maxim Integrated Products |
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DS1306 Datasheet(HTML) 11 Page - Maxim Integrated Products |
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11 / 22 page ![]() DS1306 11 of 22 SERIAL INTERFACE The DS1306 offers the flexibility to choose between two serial interface modes. The DS1306 can communicate with the SPI interface or with a standard 3-wire interface. The interface method used is determined by the SERMODE pin. When this pin is connected to VCC, SPI communication is selected. When this pin is connected to ground, standard 3-wire communication is selected. SERIAL PERIPHERAL INTERFACE (SPI) The serial peripheral interface (SPI) is a synchronous bus for address and data transfer and is used when interfacing with the SPI bus on specific Motorola microcontrollers such as the 68HC05C4 and the 68HC11A8. The SPI mode of serial communication is selected by tying the SERMODE pin to VCC. Four pins are used for the SPI. The four pins are the SDO (serial data out), SDI (serial data in), CE (chip enable), and SCLK (serial clock). The DS1306 is the slave device in an SPI application, with the microcontroller being the master. The SDI and SDO pins are the serial data input and output pins for the DS1306, respectively. The CE input is used to initiate and terminate a data transfer. The SCLK pin is used to synchronize data movement between the master (microcontroller) and the slave (DS1306) devices. The shift clock (SCLK), which is generated by the microcontroller, is active only during address and data transfer to any device on the SPI bus. The inactive clock polarity is programmable in some microcontrollers. The DS1306 determines on the clock polarity by sampling SCLK when CE becomes active. Therefore either SCLK polarity can be accommodated. Input data (SDI) is latched on the internal strobe edge and output data (SDO) is shifted out on the shift edge (Figure 5). There is one clock for each bit transferred. Address and data bits are transferred in groups of eight, MSB first. Figure 5. SERIAL CLOCK AS A FUNCTION OF MICROCONTROLLER CLOCK POLARITY (CPOL) CE CPOL = 1 SCLK DATA LATCH (WRITE) SHIFT DATA OUT (READ) CPOL = 0 SCLK DATA LATCH (WRITE) SHIFT DATA OUT (READ) NOTE 1: CPHA BIT POLARITY (IF APPLICABLE) MAY NEED TO BE SET ACCORDINGLY. NOTE 2: CPOL IS A BIT THAT IS SET IN THE MICROCONTROLLER’S CONTROL REGISTER. NOTE 3: SDO REMAINS AT HIGH-Z UNTIL 8 BITS OF DATA ARE READY TO BE SHIFTED OUT DURING A READ. |
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