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Figure 8. SPI MULTIPLE-BYTE BURST TRANSFER

READING AND WRITING IN BURST MODE

Burst mode is similar to a single-byte read or write, except that CE is kept high and additional SCLK

cycles are sent until the end of the burst. The clock registers and the user RAM may be read or written in

burst mode. When accessing the clock registers in burst mode, the address pointer will wrap around after

reaching 1Fh (9Fh for writes). When accessing the user RAM in burst mode, the address pointer wraps

around after reaching 7Fh (FFh for writes).

3-WIRE INTERFACE

The 3-wire interface mode operates similar to the SPI mode. However, in 3-wire mode there is one I/O

instead of separate data in and data out signals. The 3-wire interface consists of the I/O (SDI and SDO

pins tied together), CE, and SCLK pins. In 3-wire mode, each byte is shifted in LSB first, unlike SPI

mode, where each byte is shifted in MSB first.

As is the case with the SPI mode, an address byte is written to the device followed by a single data byte

or multiple data bytes. Figure 9 illustrates a read and write cycle. In 3-wire mode, data is input on the

rising edge of SCLK and output on the falling edge of SCLK.