LSM320HAY30 datasheet(38/42 Pages) STMICROELECTRONICS

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LSM320HAY30

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Doc ID 16917 Rev 1

Interrupt 2 source register. Read-only register.

Reading at this address clears the LA_INT2_SRC IA bit (and the interrupt signal on INT 2

pin) and allows the refreshing of data in the LA_INT2_SRC register if the latched option was

chosen.

8.19

LA_INT2_THS (36h)

8.20

LA_INT2_DURATION (37h)

The D6 - D0 bits set the minimum duration of the Interrupt 2 event to be recognized.

Duration time steps and maximum values depend on the ODR chosen.

Table 49.

LA_INT2_SRC description

Interrupt active. Default value: 0

(0: no interrupt has been generated; 1: one or more interrupts have been generated)

Z High. Default value: 0

(0: no interrupt, 1: Z High event has occurred)

Z Low. Default value: 0

(0: no interrupt; 1: Z Low event has occurred)

Y High. Default value: 0

(0: no interrupt, 1: Y High event has occurred)

Y Low. Default value: 0

(0: no interrupt, 1: Y Low event has occurred)

X High. Default value: 0

(0: no interrupt, 1: X High event has occurred)

X Low. Default value: 0

(0: no interrupt, 1: X Low event has occurred)

Table 50.

LA_INT2_THS register

THS6

THS5

THS4

THS3

THS2

THS1

THS0

Table 51.

LA_INT2_THS description

THS6 - THS0

Interrupt 1 threshold. Default value: 000 0000

Table 52.

LA_INT2_DURATION register

D6D5D4

D2D1

Table 53.

LA_INT2_DURATION description

D6 - D0

Duration value. Default value: 000 0000

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