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ST7575 Datasheet(PDF) 23 Page - Sitronix Technology Co., Ltd. |
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ST7575 Datasheet(HTML) 23 Page - Sitronix Technology Co., Ltd. |
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23 / 51 page ![]() ST7575 Ver 1.3 23/51 2007/09/12 Addressing Data is downloaded in bytes into the Display Data RAM matrix of ST7575 as shown below. The Display Data RAM has a matrix of 66 by 102 bits. The address pointer addresses the columns. The address ranges are: X 0 to 101 (1100101), Y 0 to 9 (1001) .Addresses outside these ranges are not allowed. In horizontal addressing mode the X address increments after each byte (see Fig 11). After the last X address (X = 101), X wraps around to 0 and Y increments to address the next row. After the very last address (X = 101, Y = 8) the address pointers wrap around to address (X = 0, Y =0) Data Structure Fig 9. RAM format Fig 10. Addressing : Vertical Mode (V=1) Fig 11. Addressing : Horizontal Mode (V=0) |
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