Note 3: Includes power FET leakage.

Note 4: CTLI gain is defined as:

Note 5: Specifications to -40°C are guaranteed by design, not production tested.

VV

VV

CTLI

REF

OSI

CS

=

−

()

−

()

Integrated Temperature

Controllers for Peltier Modules

6

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

unless otherwise noted.) (Note 5)

PARAMETER

SYMBOL

CONDITIONS

MIN

MAX

UNITS

-1

+1

MAXV Threshold Accuracy

-2

+2

%

MAXV, MAXIP, MAXIN

Input Bias Current

-0.1

+0.1

µA

CTLI Gain

9.5

10.5

V/V

CTLI Input Resistance

1M

Ω terminated at REF

0.5

2.0

M

Ω

Error Amp Transconductance

50

175

µS

ITEC Accuracy

-10

+10

%

ITEC Load Regulation

-0.125

+0.125

%

Instrumentation Amp

Input Bias Current

-10

+10

nA

Instrumentation Amp

Offset Voltage

-200

+200

µV

Instrumentation Amp

Preset Gain

Ω to REF

45

55

V/V

Integrator Amp Input Bias Current

1

nA

Integrator Amp Voltage Offset

-3

+3

mV

Undedicated Chopper Amp Input

Bias Current

-10

+10

nA

Undedicated Chopper Amp

Offset Voltage

-200

+200

µV

BFB_ Buffer Error

-200

+200

µV

UT and OT Leakage Current

1

µA

UT and OT Output Low Voltage

Sinking 4mA

150

mV