ACE5372

Low Power Real-Time Clock (RTC)

VER 1.2

18

III) The third method to reading data from the internal register is to start reading immediately after writing

to the slave address(0110010) and the (R/

⎯W) bit. Since the internal address pointer is set to Fh by

default , this method is only effective when reading is started from the internal address Fh.

Example 3 of data read (when data is read from internal address Fh to 3h).

Data Transmission Under Special Condition

The ACE5372 hold the clock tentatively for duration from start condition to stop condition to avoid invalid

read or write clock on carrying clock. To prevent invalid read or write clock shall be made during one

transmission operation. When 0.5 to 1.0 seconds elapses after start condition any access to the ACE5372

is automatically released to release tentative hold of the clock and access from the CPU is forced to be

terminated (automatic resume function from the interface).

Also a second start condition after the first condition and before the stop condition is regarded as the

“repeated start condition”. Therefore, when 0.5 to 1.0 seconds passed after the first start condition,

access to the ACE5372 is automatically released.

The user shall always be able to access the real-time clock as long as the following two conditions are

met.

1) No stop condition shall be generated until clock read/write is started and completed.

2) One cycle read/write operation shall be completed within 0.5 seconds.

Bad example of reading from seconds to hours (invalid read)

(Start condition) → (Read of seconds) → (Read of minutes) → (Stop condition) → (Start condition) →

(Read of hour) → (Stop condition)

Assuming read was started at 09:59:59PM, and while reading seconds and minutes the time

advanced to 10:00:00 PM. At this time second digit is hold so the read as 59:59. ACE5372

confirms (Stop condition) and carry second digit being hold and the time changes to 10:00:00 PM.

Then, when the hour digit is read, it changes to 10. The wrong results of 10:59:59 will be read.

Configuration of Oscillating Circuit and Time Trimming Circuit

a)In general crystal oscillators are classified by their central frequency of CL (load capacitance) and

available further grouped in several ranks as ±10，±20 and ±50ppm of fluctuations in precision.

b)The fluctuation of IC circuit frequency is ±5~10ppm at room temperature.

c)Here, the clock accuracy at room temperature varies along with the variation of the characteristic of

crystal oscillator.

CPU to ACE5372

ACE5372 to CPU

Acknowledge signal

Start signal

Stop signal

Repeat Start signal