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TTTech Computertechnik AG

Revision 2.1

14 - 20

AS8202NF TTP-C2NF

If using an external oscillator at 10 MHz with enabled internal PLL, the oscillator must have a period of 100 ns with low

jitter. Note that a crystal-based clock is recommended over a derived clock (i.e., PLL-based) to allow best internal PLL

performance.

inputs and the PCB and is derived from measurements to be about 3.5 … 4.0 pF.

Figure 10. Bus Guardian clock setup

Both the XIN0/XOUT0 (main clock) and the XIN1/XOUT1 (bus guardian clock) cells support driving a quartz crystal

oscillation as well as clock input by an external oscillator.

Build-up Characteristics

Table 9. Parameters

Parameter

Condition

Min

Typ

Max

Unit

R_osc10

0.95

1

1. Not tested during production.

1.62

1

k

Ω

R_osc16

0.37

1

0.64

1

k

Ω

R_osc20

0.24

1

0.41

1

k

Ω

Table 10. Characteristics

Symbol

Pin

Parameter

Min

Typ

Max

Unit

Note

Tosc_startup0

XIN0/

XOUT0

Oscillator startup time

(Main clock)

20

ms

Quartz frequency:

10 MHz

Tosc_startup1

XIN1/

XOUT1

Oscillator startup time

(Bus Guardian clock)

20 ms

ms

Quartz frequency:

16 MHz

Tpll_startup0

XIN0/

XOUT0

PLL startup time

(Main clock)

20 ms

ms

Quartz frequency:

10 MHz

16 M H z

Rd

Rf

Ce x t

Ce x t

16 M H z

sq u a r e

wa v e

External quartz

External oscillator