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LTC3860

3860f

operaTion (Refer to Functional Diagram)

Using the LTC3860 Error Amplifiers in

Multiphase Applications

Due to the low output impedance of the error amplifiers,

multiphase applications using the LTC3860 use one error

amplifier as the master with all of the slaves’ error ampli-

fiers disabled. The channel 1 error amplifier (phase = 0°)

may be used as the master with phases 2 through n (up to

12) serving as slaves. To disable the slave error amplifiers

connect the FB pins of the slaves to VCC. This three-states

the output stages of the amplifiers. All COMP pins should

then be connected together to create PWM outputs for all

phases.Asnotedinthesectiononsoft-start,allTRACK/SS

pins should also be shorted together. Refer to the Multi-

phase Operation section in Applications Information for

schematics of various multiphase configurations.

Theory and Benefits of Multiphase Operation

Multiphase operation provides several benefits over tra-

ditional single phase power supplies:

Greater output current capability

Improved transient response

Reduction in component size

Increased real world operating efficiency

Because multiphase operation parallels power stages,

the amount of output current available is n times what it

would be with a single comparable output stage, where n

is equal to the number of phases.

Interleaving of multiple power stages increases the ef-

fective switching frequency that the control loop sees,

correspondingly increasing the practical control loop

bandwidth to approximately n/3-times the actual switch-

ing frequency. This improves transient response, as well

as reducing component size and increasing real world

operating efficiency.

Power Good Indicator Pins (PGOOD1, PGOOD2)

Each PGOOD pin is connected to the open drain of an

internal pull-down device which pulls the PGOOD pin

low when the corresponding FB pin voltage is outside

the PGOOD regulation window (±7.5% entering regula-

tion, ±10% leaving regulation). The PGOOD pins are also

pulled low when the corresponding RUN pin is low, or

during UVLO.

In multiphase applications, one FB pin and error amplifier

are used to control all of the phases. PGOOD outputs for

the slave phases may be left unconnected as they will not

report fault conditions.

PWM and PWMEN Pins

The PWM pins are three-state compatible outputs, de-

signed to drive MOSFET drivers, DRMOSs, etc which do

not represent a heavy capacitive load. An external resistor

divider may be used to set the voltage to mid-rail while in

the high impedance state.

ThePWMENoutputshaveanopen-drainpull-uptoVCCand

requireanappropriateexternalpull-downresistor.Thispin

is intended to drive the enable pins of the MOSFET driv-

ers that do not have three-state compatible PWM inputs.

PWMEN is low only when PWM is high impedance, and

high at any other PWM state.

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