PAC407BCA/PAC407BCW

CMOS Image Sensor IC

Version 1.7, 13 Sep

2004

PixArt Imaging Inc.

E-mail: fae_service@pixart.com.tw

5

2. Block Diagram

AE

Sensor Interface

Output Formatter

Pipelined

Image

Flow

Processor

Serial

Interface

Timing

Generator

VGA

Image

Core

AWB

AFE

Register

Bank

YUV data

Data Flow

Control Flow

Figure 2.1. PAC407 block diagram

The PAC407 is a 1/4” CMOS imaging sensor with 644x488 physical pixels. The active region of sensor

array is 644x484. The sensor array is cover with Bayer pattern color filters and micro-lens. The first pixel

location <0,0> is programmable in 2 direction (X and Y) and the default value is at the left-down side of

sensor array.

After a programmable exposure time, the signals of image are sampled first with CDS (Correlated Double

Sampling) block to improve S/N ratio and reduce fixed pattern noise (FPN).

Three analog gain stages are implemented before signals are transferred to 10-Bit ADC. The front gain

stage (FG) can be programmed to fit the saturation level of sensor to the full-range input of ADC. The

programmable color gain stage (CG) is used to balance the luminance response difference between B, G

and R color. The global gain stage (GG) is programmed to adapt the gain to the image luminance.

After three gain stages, the signals will be digitized by the on-chip 10-Bit ADC. After the image data have

been digitized, further adjustment to the signal can be applied before the data is output to next stage.