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WM8181 Datasheet(PDF) 6 Page - Wolfson Microelectronics plc |
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WM8181 Datasheet(HTML) 6 Page - Wolfson Microelectronics plc |
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6 / 14 page ![]() WM8181 Advanced Information WOLFSON MICROELECTRONICS LTD AI Rev 3.0 January 2000 6 MCLK VSMP DOUT DON'T CARE 64 MCLK Rising Edges t PZD Hi-Z t PZE t PD Hi-Z Figure 2 Power Down/Power Up TEST CHARACTERISTICS AVDD = DVDD = 2.97 to 3.63V and 4.5 to 5.5V, AGND1 = AGND2 = DGND = 0V, TA = 0 to 70 °C, MCLK = 24MHz unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT VSMP to DOUT enabled tPZE 10 ns VSMP to DOUT enabled tPZE AVDD = DVDD = 3.3V 10 ns MCLK to DOUT disabled tPZD 10 ns MCLK to DOUT disabled tPZD AVDD = DVDD = 3.3V 10 ns MCLK to DOUT propagation delay tPD 10 ns MCLK to DOUT propagation delay tPD AVDD = DVDD = 3.3V 15 ns Note: Parameters are measured at 50% of the rising/falling edge. MCLK VSMP INPUT VIDEO (CCD) t VSU t VH VIDEO (CIS) Figure 3 Input Video Timing TEST CHARACTERISTICS AVDD = DVDD = 2.97 to 3.63V and 4.5 to 5.5V, AGND1 = AGND2 = DGND = 0V, TA = 0 to 70 °C, MCLK = 24MHz unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Input video set-up time tVSU 10 ns Input video hold time tVH 20 ns Notes: 1. tVSU and tRSU denote the set-up time required from when the input video signal has settled. 2. Parameters are measured at 50% of the rising/falling edge. |
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