WM8816

Advanced Information

WOLFSON MICROELECTRONICS LTD

AI Rev 1.1 September 2000

8

TEST REGISTER

When bit 1 in register CR5 is set, MUTEB becomes an output pin. Bits 2, 3 and 4 select different

internal signals which can then be seen via the MUTEB pin.

DATA BYTE BITS

CONDITION

76

54

32

10

FUNCTION

Normal (MUTEB

configured as input)

0

0

0

0

0

0

0

1

Latch the new gain value to resistor network

0

0

0

0

0

0

1

0

Left delay generator

0

0

0

0

0

1

1

0

Left peak detector

00

00

10

10

Left zero crossing

0

0

0

0

1

1

1

0

Left enable for zero crossing and delay generator

0

0

0

1

0

0

1

0

Right delay generator

0

0

0

1

0

1

1

0

Right peak detector

00

01

10

10

Right zero crossing

Test Mode

(MUTEB configured

as output)

0

0

0

1

1

1

1

0

Right enable for zero crossing and delay generator

Table 2 Test Register Description

PERFORMANCE GRAPHS

Figure 2 THD + Noise versus input level at gains of +6dB, 0dB, -6dB, -12dB and mute

Figure 3 FFT of output signal with 1kHz, 1V rms sine wave input

-120

-70

-110

-100

-90

-80

(dB)

THD+N

-60

+10

-50

-40

-30

-20

-10

+0

Input Signal Level (dBV)

5k

30k

10k

15k

20k

25k

Frequency (Hz)

-140

+0

-120

-100

-80

-60

-40

-20

d

B

V