X86C64 datasheet(4/12 Pages) XICOR

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X86C64

MODE SELECTION

Mode

I/O

Power

VSS

Standby

High Z

Standby (CMOS)

VIL

Standby

High Z

Standby (TTL)

VIH

VIL

VIH

Read

DOUT

Active

VIH

VIL

Write

DIN

Active

3819 PGM T08

PAGE WRITE OPERATION

Regardless of the microcontroller employed, the X86C64

supports page mode write operations. This allows the

microcontroller to write from one to thirty-two bytes of

data to the X86C64. Each individual write within a page

write operation must conform to the byte write timing

requirements. The falling edge of

DS starts a timer

delaying the internal programming cycle 100

µs. There-

fore, each successive write operation must begin within

100

µs of the last byte written. The following waveforms

illustrate the sequence and timing requirements.

Page Write Timing Sequence for DS Controlled Operation

Notes: (1) For each successive write within a page write cycle A5–A12 must be the same.

(2) Although it is not illustrated, the microcontroller may interleave read operations between the individual byte writes within the page

write operation. Two responses are possible.

a. Reading from the same plane being written (A12 of Read = A12 of Write) is effectively a Toggle Bit Polling operation.

b. Reading from the opposite plane being written (A12 of Read ≠ A12 of Write) true data will be returned, facilitating the use of a

single memory component as both program and data store.

tBLC

A/D0–A/D7

A8–A12

R/W

AIN

DIN

A12=n

OPERATION

BYTE 0

BYTE 1

BYTE 2

LAST BYTE

READ (1)(2)

AFTER tWC READY FOR

NEXT WRITE OPERATION

tWC

3819 FHD F07

AIN

DIN

A12=n

AIN

DIN

A12=n

AIN

DIN

A12=n

AIN

DIN

A12=x

AIN

ADDR

AIN

Next Address

3819 FHD F07

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