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AM1808AZCED3 Datasheet(PDF) 42 Page - Texas Instruments |
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AM1808AZCED3 Datasheet(HTML) 42 Page - Texas Instruments |
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42 / 264 page ![]() AM1808 SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010 www.ti.com 3.7.18 Ethernet Media Access Controller (EMAC) Table 3-20. Ethernet Media Access Controller (EMAC) Terminal Functions SIGNAL POWER TYPE(1) PULL(2) DESCRIPTION GROUP(3) NAME NO. MII AXR6 / CLKR0 / GP1[14] / MII_TXEN / PRU0_R31[6] C1 O CP[5] A EMAC MII Transmit enable output AXR5 / CLKX0 / GP1[13] / MII_TXCLK D3 I CP[5] A EMAC MII Transmit clock input AXR4 / FSR0 / GP1[12] / MII_COL D1 I CP[5] A EMAC MII Collision detect input AXR3 / FSX0 / GP1[11] / MII_TXD[3] E3 O CP[5] A AXR2 / DR0 / GP1[10] / MII_TXD[2] E2 O CP[5] A EMAC MII transmit data AXR1 / DX0 / GP1[9] / MII_TXD[1] E1 O CP[5] A AXR0 / ECAP0_APWM0 / GP8[7] / MII_TXD[0] / F3 O CP[6] A CLKS0 SPI0_SOMI / EPWMSYNCI / GP8[6] / MII_RXER C16 I CP[7] A EMAC MII receive error input SPI0_SIMO /EPWMSYNCO / GP8[5] / MII_CRS C18 I CP[7] A EMAC MII carrier sense input SPI0_CLK / EPWM0A / GP1[8] / MII_RXCLK D19 I CP[7] A EMAC MII receive clock input SPI0_ENA / EPWM0B / PRU0_R30[6] / MII_RXDV C17 I CP[7] A EMAC MII receive data valid input SPI0_SCS[5] /UART0_RXD / GP8[4] / MII_RXD[3] C19 I CP[8] A SPI0_SCS[4] /UART0_TXD / GP8[3] / MII_RXD[2] D18 I CP[8] A SPI0_SCS[3] / UART0_CTS / GP8[2] / MII_RXD[1] / EMAC MII receive data E17 I CP[9] A SATA_MP_SWITCH SPI0_SCS[2] / UART0_RTS / GP8[1] / MII_RXD[0] / D16 I CP[9] A SATA_CP_DET RMII VP_DIN[1] / UHPI_HD[9] / UPP_D[9] / W18 I/O CP[26] C EMAC 50-MHz clock input or output RMII_MHZ_50_CLK / PRU0_R31[23] VP_DIN[2] / UHPI_HD[10] / UPP_D[10] / RMII_RXER / W17 I CP[26] C EMAC RMII receiver error PRU0_R31[24] VP_DIN[3] / UHPI_HD[11] / UPP_D[11] / RMII_RXD[0] V17 I CP[26] C / PRU0_R31[25] EMAC RMII receive data VP_DIN[4] / UHPI_HD[12] / UPP_D[12] / RMII_RXD[1] W16 I CP[26] C /PRU0_R31[26] VP_DIN[0] / UHPI_HD[8] / UPP_D[8] / RMII_CRS_DV/ W19 I CP[26] C EMAC RMII carrier sense data valid PRU1_R31[29] VP_DIN[5] / UHPI_HD[13] / UPP_D[13] / RMII_TXEN R14 O CP[26] C EMAC RMII transmit enable /PRU0_R31[27] VP_DIN[6] / UHPI_HD[14] / UPP_D[14] / RMII_TXD[0] V16 O CP[26] C / PRU0_R31[28] EMAC RMII transmit data VP_DIN[7] / UHPI_HD[15] / UPP_D[15] / RMII_TXD[1] U18 O CP[26] C / PRU0_R31[29] MDIO SPI0_SCS[0] /TM64P1_OUT12 / GP1[6] / MDIO_D / D17 I/O CP[10] A MDIO serial data TM64P1_IN12 (1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal. Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the signal name highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different types (ie., input versus output), the table reflects the pin function direction for that particular peripheral. (2) IPD = Internal Pulldown resistor; IPU = Internal Pullup resistor; CP[n] = configurable pull-up/pull-down (where n is the pin group) using the PUPDENA and PUPDSEL registers in the System Module. The pull-up and pull-down control of these pins is not active until the device is out of reset. During reset, all of the pins associated with these registers are weakly pulled down. If the application requires a pull-up, an external pull-up can be used. (3) This signal is part of a dual-voltage IO group (A, B or C). These groups can be operated at 3.3V or 1.8V nominal. The three groups can be operated at independent voltages but all pins withina group will operate at the same voltage. Group A operates at the voltage of power supply DVDD3318_A. Group B operates at the voltage of power supply DVDD3318_B. Group C operates at the voltage of power supply DVDD3318_C. 42 Device Overview Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM1808 |
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