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AM1808AZCED3 Datasheet(PDF) 139 Page - Texas Instruments |
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AM1808AZCED3 Datasheet(HTML) 139 Page - Texas Instruments |
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139 / 264 page ![]() 15 14 13 13 13 13 13 13 13 12 12 11 10 10 9 A0 A1 B0 B1 A30 A31 B30 B31 C0 C1 C2 C3 C31 AHCLKR/X (Falling Edge Polarity) AHCLKR/X (Rising Edge Polarity) AFSR/X (Bit Width, 0 Bit Delay) AFSR/X (Bit Width, 1 Bit Delay) AFSR/X (Bit Width, 2 Bit Delay) AFSR/X (Slot Width, 0 Bit Delay) AFSR/X (Slot Width, 1 Bit Delay) AFSR/X (Slot Width, 2 Bit Delay) AXR[n] (Data Out/Transmit) ACLKR/X (CLKRP = CLKXP = 0)(B) ACLKR/X (CLKRP = CLKXP = 1)(A) AM1808 www.ti.com SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010 A. For CLKRP = CLKXP = 1, the McASP transmitter is configured for falling edge (to shift data out) and the McASP receiver is configured for rising edge (to shift data in). B. For CLKRP = CLKXP = 0, the McASP transmitter is configured for rising edge (to shift data out) and the McASP receiver is configured for falling edge (to shift data in). Figure 6-31. McASP Output Timings Copyright © 2010, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 139 Submit Documentation Feedback Product Folder Link(s): AM1808 |
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