AM1808AZCED3 datasheet(213/264 Pages) TI

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AM1808

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SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010

6.25.3 HPI Electrical Data/Timing

Table 6-112. Timing Requirements for Host-Port Interface [1.3V, 1.2V, 1.1V](1) (2)

1.3V, 1.2V, 1.1V, 1.0V

NO.

UNIT

MIN

MAX

tsu(SELV-HSTBL)

Setup time, select signals(3) valid before UHPI_HSTROBE low

th(HSTBL-SELV)

Hold time, select signals(3) valid after UHPI_HSTROBE low

tw(HSTBL)

Pulse duration, UHPI_HSTROBE active low

tw(HSTBH)

Pulse duration, UHPI_HSTROBE inactive high between consecutive accesses

tsu(SELV-HASL)

Setup time, selects signals valid before UHPI_HAS low

th(HASL-SELV)

Hold time, select signals valid after UHPI_HAS low

tsu(HDV-HSTBH)

Setup time, host data valid before UHPI_HSTROBE high

th(HSTBH-HDV)

Hold time, host data valid after UHPI_HSTROBE high

Hold time, UHPI_HSTROBE high after UHPI_HRDY low. UHPI_HSTROBE

th(HRDYL-HSTBH)

should not be inactivated until UHPI_HRDY is active (low); otherwise, HPI writes

will not complete properly.

tsu(HASL-HSTBL)

Setup time, UHPI_HAS low before UHPI_HSTROBE low

th(HSTBL-HASH)

Hold time, UHPI_HAS low after UHPI_HSTROBE low

(1)

UHPI_HSTROBE refers to the following logical operation on UHPI_HCS, UHPI_HDS1, and UHPI_HDS2: [NOT(UHPI_HDS1 XOR

UHPI_HDS2)] OR UHPI_HCS.

(2)

M=SYSCLK2 period in ns.

(3)

Select signals include: HCNTL[1:0], HR/W and HHWIL.

Peripheral Information and Electrical Specifications

213

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