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HT68F03 Datasheet(PDF) 50 Page - Holtek Semiconductor Inc |
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HT68F03 Datasheet(HTML) 50 Page - Holtek Semiconductor Inc |
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50 / 139 page  HT66F03/HT66F04/HT68F03/HT68F04 Rev. 1.00 50 April 16, 2010 · PRM Register ¨ HT66F03/HT68F03/HT68F04 Bit 76543210 Name PRML3 PRML2 PRML1 PRML0 ¾ PRMS2 PRMS1 PRMS0 R/W R/W R/W R/W R/W ¾ R/W R/W R/W POR 0101 ¾ 000 Bit 7~4 PRML3~PRML0: pin-remapping function lock bits (default: 0101) 1010: PRM register write operation is enabled Others: PRM register write operation is disabled Bit 3 Unimplemented, read as ²0² Bit 2 PRMS2: INT/TCK1 pin-remapping function selection bit 1: INT on PA7, TCK1 on PA7. 0: INT on PA3, TCK1 on PA3. Bit 1~0 PRMS1~PRMS0: pin-remapping function selection bits 0x: TP0 on PA3, TP1/TCK0 on PA4. 10: TP0 on PA5, TP1/TCK0 on PA6. 11: TP0 on PA2, TP1/TCK0 on PA7. · HT66F04 Bit 76543210 Name PRML3 PRML2 PRML1 PRML0 ¾ PRMS2 PRMS1 PRMS0 R/W R/W R/W R/W R/W ¾ R/W R/W R/W POR 0101 ¾ 000 Bit 7~4 PRML3~PRML0: pin-remapping function lock bits (default: 0101) 1010: PRM register write operation is enabled Others: PRM register write operation is disabled Bit 3 Unimplemented, read as ²0² Bit 2 PRMS2: INT/TCK1 pin-remapping function selection bit 1: INT on PA7, TCK1 on PA7. 0: INT on PA3, TCK1 on PA3. Bit 1~0 PRMS1~PRMS0: pin-remapping function selection bits 00: TP0/TCK2 on PA3, TP1/TCK0 on PA4, TP2B on PA5, TP2A on PA6 01: TP0/TCK2 on PA3, TP1/TCK0 on PA4, TP2B on PA0, TP2A on PA1 10: TP0/TCK2 on PA5, TP1/TCK0 on PA6, TP2B on PA2, TP2A on PA7 11: TP0/TCK2 on PA2, TP1/TCK0 on PA7, TP2B on PA5, TP2A on PA6 I/O Pin Structures The accompanying diagrams illustrate the internal structures of some generic I/O pin types. As the exact logical construction of the I/O pin will differ from these drawings, they are supplied as a guide only to assist with the functional understanding of the I/O pins. The wide range of pin-shared structures does not permit all types to be shown. Programming Considerations Within the user program, one of the first things to con- sider is port initialisation. After a reset, all of the I/O data and port control register will be set high. This means that all I/O pins will default to an input state, the level of which depends on the other connected circuitry and whether pull-high selections have been chosen. If the port con- trol register, PAC, is then programmed to setup some pins as outputs, these output pins will have an initial high output value unless the associated port data register, PA, is first programmed. Selecting which pins are inputs and which are outputs can be achieved byte-wide by loading the correct values into the appropriate port con- trol register or by programming individual bits in the port control register using the ²SET [m].i² and ²CLR [m].i² in- structions. Note that when using these bit control in- structions, a read-modify-write operation takes place. The microcontroller must first read in the data on the en- tire port, modify it to the required new bit values and then rewrite this data back to the output ports. |
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