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TUSB1310 Datasheet(PDF) 31 Page - Texas Instruments |
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TUSB1310 Datasheet(HTML) 31 Page - Texas Instruments |
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31 / 36 page ![]() VDD1 P 1 VDD 1 P 8 and Analog Power Supplies OUT _ ENABLE XI RESETN Latch - In of Hardware Strapping Pins ULPI _ DIR Tcfgin 1 Drive Output Strapping pins Tcfgin 2 TUSB1310 www.ti.com SLLSE16B – DECEMBER 2009 – REVISED JUNE 2010 DC CHARACTERISTICS FOR 1.8-V DIGITAL IO (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER MIN TYP MAX UNIT VTX_DIFF_SS SSTXP/SSTXN Differential p-p Tx voltage swing 0.8 1.2 V RTX_DIFF_DC DC differential impedance 72 120 Ω VTX_RCV_DET The amount of voltage change allowed during receiver detection 0.6 V CAC_COUPLING AC coupling capacitor 75 200 nF RRX_DC Receiver DC common mode impedance 18 30 Ω RRX_DIFF_DC DC differential impedance 72 120 Ω VRX_LFPS_DET LFPS detect threshold 100 300 mV VCM_AC_LFPS 100 mV VCM_LFPS_active 10 mV VTX_DIFF_PP_LFPS 800 1200 mV VDDA3P3 power consumption(2) 13 mW VDDA1P8 power consumption(2) 77 mW VDDA1P1 power consumption(2) 118 mW VDD1P1 power consumption(2) 98 mW VDD1P8 power consumption(2) 128 mW (2) Power consumption condition is transmitting and/or receiving (in U0) at 25°C and nominal voltages. 6.4 AC Characteristics 6.4.1 Power Up and Reset Timing The TUSB1310 does not drive signals on any strapping pins before they are latched internally. Figure 6-1. Power Up and Reset Timing Table 6-1. Power Up and Reset Timing SYMBOL DESCRIPTION MIN TYP MAX UNIT Tcfgin1 Hardware configuration latch-in time from RESETN 0 ns Tcfgin2 Time from RESETN to dDriver outputs on strapping pins 0 ns RESETN pulse width 1 µs RESETN to PHY_STATUS de-assertion 300 µs Copyright © 2009–2010, Texas Instruments Incorporated ELECTRICAL SPECIFICATIONS 31 Submit Documentation Feedback Product Folder Link(s): TUSB1310 |
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