3

2586L–AVR–06/10

ATtiny25/45/85

resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port B also serves the functions of various special features of the ATtiny25/45/85 as listed in

On ATtiny25, the programmable I/O ports PB3 and PB4 (pins 2 and 3) are exchanged in

ATtiny15 Compatibility Mode for supporting the backward compatibility with ATtiny15.

1.1.4

RESET

Reset input. A low level on this pin for longer than the minimum pulse length will generate a

reset, even if the clock is not running and provided the reset pin has not been disabled. The min-

generate a reset.

The reset pin can also be used as a (weak) I/O pin.