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Preliminary
5-83
RF2668
Rev B4 010423
5
Evaluation Board Schematic
Dual Output Band
Band Gap
Rel
Bias
Supply
Quad
/2
Σ
48
45
46
47
44
43
42
41
40
39
38
37
13
16
15
14
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
L1
100 nH
C3
0.5 pF
50
Ωµstrip
J1
PCS
RF OUT
VCC
C18
10 nF
VCC
C5
100 pF
50
Ωµstrip
J2
LO2
C6
100 pF
C9
1nF
T1
T4-1
50
Ωµstrip
J3
MIX IN
C8
1nF
C7
1nF
C1
1nF
C2
10 nF
VCC MODE CE
TX
EN
MIX
EN
VCO
EN
PLL
ON
R3
270
Ω
C19
1nF
50
Ωµstrip
J8
OSC REF
SET1
SET2
R2
47 k
Ω
C13
10 nF
VCC
T3
T4-1
R7
200
Ω
50
Ωµstrip
J7
L01
D1
L2
39 nH
C16*
L3
39 nH
VCC
R8*
C17
10 nF
R9
3.9 k
Ω
VTUNE
DO
LD
C20
10 nF
DO
T2
T4-1
50
Ωµstrip
J4
MOD OUT
C10
10 nF
VCC
C11
1nF
C12
1nF
R1
39 k
Ω
VGC
VCC
C23
10 nF
50
Ωµstrip
J5
OSIG
C24
10 nF
REF
50
Ω µstrip
J6
ISIG
P1
1
2
3
4
5
6
7
8
9
10
LDOUT
GND
SET2
SET1
PLLON
VCO EN
MIX EN
TX EN
CE
MODE
P2
1
2
3
VGC
GND
REF
P3
1
2
3
VCC
GND
VTUNE
Lock
Detect
/R
/N
Charge
Pump
R4
36 k
Ω
C26
1nF
C22
220 pF
C21
2.2 nF
C27
33 pF
2668401-
C4
10 nF
Chip Enable
R5
510
Ω
LD
C25
10 nF
R10
510 k
Ω
R6*
LD OUT
Q1
PNP
Digikey
MMBT3906DICT-ND
VCC
L4*
22 nH
R11*
C28*
4pF
R12*
L5
10 nH
L6*
C29
3pF
L7
22 nH
L8*
50
Ωµstrip
J9
Cellular
RF OUT
*Denotes not normally populated.