KB2502 datasheet(49/62 Pages) SAMSUNG

49 / 62 page

KB2502

VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS

Preliminary

•

PLL of the KB2502

PLL is composed of the phase detector, charge pump, VCO, and N-divider as 4 sub-blocks.

The following is the description of the input/output signals.

- HFLB (Input)

Horizontal flyback signal is refrence signal of the PLL built in KB2502.

The HFLB signal's frequency range is 15 ~ 90kHz, so the PLL block must be a wide range PLL that can cover

HFLB's entire frequency range.

- VCO (Input)

Error signal that passes through an external loop filter is input into VCO.

Operation voltage range is 1-4V. You can raise immunity towards external noise by lowering VCO

sensitivity. You can do this by making it have the maximum operation voltage range possible in the 5V power

voltage.

Figure 23. Block Diagram of the PLL Built in KB2502

Phase

Detector

Charge

Pump

VCO

N-Divider

Loop

Filter

VCO_in

(Pin3)

Div_out

HFLB (Pin32)

CP_out

(Pin4)

VCO_out

CP0

CP1

DOT0

DOT1

HF0 HF1 HF2

# Composed of External Components

fHFLB

< 0.4V

> 4.2V

~2us

KB2502 Datasheet(PDF) 49 Page - Samsung semiconductor

KB2502 Datasheet(HTML) 49 Page - Samsung semiconductor

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