| Electronic Components Datasheet Search |
|
HMP8154 Datasheet(PDF) 21 Page - Intersil Corporation |
|
|
|||||||||||||||||||||||||||||
HMP8154 Datasheet(HTML) 21 Page - Intersil Corporation |
|
21 / 34 page ![]() 21 TABLE 19. CLOSED CAPTION_21A DATA REGISTER SUB ADDRESS = 10H BIT NUMBER FUNCTION DESCRIPTION RESET STATE 7-0 Line 21 Caption Data (First Byte) This register is cascaded with the closed caption_21B data register and they are read out se- rially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of the 21A data register is shifted out first. 80H TABLE 20. CLOSED CAPTION_21B DATA REGISTER SUB ADDRESS = 11H BIT NUMBER FUNCTION DESCRIPTION RESET STATE 7-0 Line 21 Caption Data (Second Byte) This register is cascaded with the closed caption_21A data register and they are read out se- rially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of the 21A data register is shifted out first. 80H TABLE 21. CLOSED CAPTION_284A DATA REGISTER SUB ADDRESS = 12H BIT NUMBER FUNCTION DESCRIPTION RESET STATE 7-0 Line 284 Caption Data (First Byte) This register is cascaded with the closed caption_284B data register and they are read out se- rially as 16 bits during line 281, 284, or 335 if line 284 captioning is enabled. Bit D0 of the 284A data register is shifted out first. 80H TABLE 22. CLOSED CAPTION_284B DATA REGISTER SUB ADDRESS = 13H BIT NUMBER FUNCTION DESCRIPTION RESET STATE 7-0 Line 284 Caption Data (Second Byte) This register is cascaded with the closed caption_284A data register and they are read out se- rially as 16 bits during line 281, 284, or 335 if line 284 captioning is enabled. Bit D0 of the 284A data register is shifted out first. 80H TABLE 23. START H_BLANK LOW REGISTER SUB ADDRESS = 20H BIT NUMBER FUNCTION DESCRIPTION RESET STATE 7-0 Assert BLANK Output Signal (Horizontal) This 8-bit register is cascaded with Start H_Blank High Register to form a 10-bit start_horizontal_blank register. It specifies the horizontal count (in 1X clock cycles) at which to start ignoring pixel data each scan line. The leading edge of HSYNC is count 020H. This register is ignored unless BLANK is configured as an output. 4AH TABLE 24. START H_BLANK HIGH REGISTER SUB ADDRESS = 21H BIT NUMBER FUNCTION DESCRIPTION RESET STATE 7-2 Reserved 000000B 1-0 Assert BLANK Output Signal (Horizontal) This 2-bit register is cascaded with Start H_Blank Low Register to form a 10-bit start_horizontal_blank register. It specifies the horizontal count (in 1x clock cycles) at which to start ignoring pixel data each scan line. The leading edge of HSYNC is count 020H. This reg- ister is ignored unless BLANK is configured as an output. 11B HMP8154, HMP8156A |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |