Z550 datasheet(36/73 Pages) INTEL

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Electrical Specifications

Datasheet

Symbol

Parameter

Min.

Typ.

Max.

Unit

Notes11

ICCA

ICC for VCCA Supply

—

130

ICCP+ ICCPC6

ICCP + ICCPC6 before VCC Stable

—

2.5

ICCP+ ICCPC6

ICCP + ICCPC6 after VCC Stable

—

1.5

NOTES:

Each processor is programmed with a maximum valid voltage identification value

(VID), which is set at manufacturing and cannot be altered. Individual maximum VID

values are calibrated during manufacturing such that two processors at the same

frequency may have different settings within the VID range. Note that this differs from

the VID employed by the processor during a power management event (Thermal

Monitor 2, Enhanced Intel SpeedStep technology, or Enhanced Halt State). Typical

AVID range is 0.75 V to 1.1 V.

The voltage specifications are assumed to be measured across VCC_SENSE and

VSS_SENSE pins at the socket with a 100-MHz bandwidth oscilloscope, 1.5-pF

maximum probe capacitance, and 1-MΩ minimum impedance. The maximum length of

ground wire on the probe should be less than 5 mm. Ensure external noise from the

system is not coupled in the scope probe.

Specified at 90°C T

Specified at the nominal VCC.

Measured at the bulk capacitors on the motherboard.

VCC,BOOT tolerance is shown in Figure 6 and Figure 7.

Based on simulations and averaged over the duration of any change in current.

Specified by design/characterization at nominal VCC. Not 100% tested.

This is a power-up peak current specification, which is applicable when VCCP is high and

VCC_CORE is low.

This is a steady-state ICC current specification, which is applicable when both VCCP and

VCC_CORE are high.

10. The VCC maximum supported by the process is 1.1 V but the parameter can change

(burn in voltage is higher).

11. Unless otherwise noted, all specifications in this table are based on estimates and

simulations or empirical data. These specifications will be updated with characterized

data from silicon measurements at a later date.

12. VCCP may be turned off during C6 power state— VCCPC6 must always be powered on to

1.05 V -5/+10% on all power states.

13. The VCC power supply needs to be set to 0.3V during C6 power state.

14. VCCP (voltage rail which is turned off in C6, with SPLIT VTT Enabled) should ramp to

1.05 V while exiting C6 (Deep Power Down Technology State) at least 5µs before

VCC_CORE ramps to LFM VID. In addition, VCCPC6 rail should remain at 1.05 -5/+10%

during VCCP ramp coming out of C6.

Z550 Datasheet(PDF) 36 Page - Intel Corporation

Z550 Datasheet(HTML) 36 Page - Intel Corporation

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