LM27402 datasheet(17/32 Pages) NSC

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30092619

FIGURE 10. DCR Sensing Circuit

The most accurate sensing of voltage across the DCR is

achieved by matching the time constant of the R

SCS filter with

the inductor L/R

DCR time constant. If the time constants are

matched, the voltage across the capacitor follows the voltage

across the DCR. A typical range of capacitance used in the

SCS network is 100 nF to 1µF. The equation matching the

time constants is:

The current limit threshold can be adjusted to any level with

a single resistor from the current limit comparator to the output

voltage pin. Use the circuit in Figure 11 to set the current limit.

30092620

FIGURE 11. Setting the Current Limit Level

Since the voltage across the inductor DCR follows the current

through the inductor, the device will trip at the peak of the

inductor current. Capacitor C

SBY shown in Figure 11 filters the

input to the current sense comparator. A working range for

this capacitance is 47 pF to 100 pF. The equation to set the

resistor value of R

SET is:

LIMIT (A) is the desired current limit level, RDCR (Ω) is the rated

DC resistance of the inductor and I

cs- (A) is the 10 µA current

source flowing out of the CS- pin.

The internal current source I

CS- is powered from the input

voltage rail (VIN). The minimum voltage required to power the

current source is 1V from VIN to V

OUT. If a condition occurs

where VIN - V

OUT < 1V, the LM27402 may prematurely initiate

hiccup mode. There are multiple options to avoid this situa-

tion. The first option is to enable the LM27402 after the input

voltage has risen 1V above the nominal output voltage as

seen in Figure 6. The second option is to lower the comparator

common mode voltage shown in Figure 12 such that the I

CS-

current source has enough headroom voltage.

30092681

FIGURE 12. Common Mode Voltage Resistor Divider

Network

Please refer to Application Note AN-2060 for design guide-

lines to adjust the common mode voltage of the current sense

comparator.

CONTROL LOOP COMPENSATION

The LM27402 voltage mode control system incorporates in-

put voltage feed-forward to eliminate the input voltage de-

pendence of the PWM gain. Input voltage feed-forward allows

the LM27402 to be stable throughout the entire input voltage

range and makes it easier for the designer to select the com-

pensation and power components. The following text will

describe how to set the output voltage and obtain the open

loop transfer function.

During steady state operation, the DC output voltage is set by

a feedback resistor network between V

OUT, FB and GND. The

FB voltage is nominally 0.6V ±1%. The equation describing

the output voltage is:

A good starting value for R

FB1 is 20 kΩ. If an output voltage

of 0.6V is required, R

FB2 should not be used.

There are three main blocks of a voltage mode buck switcher

that the power supply designer must consider when designing

the control system: the powertrain, PWM modulator, and the

compensator. A diagram representing the control loop is

shown in Figure 13.

LM27402 Datasheet(PDF) 17 Page - National Semiconductor (TI)

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