LB1875

No. 6002-6/17

Block Diagram and Sample Application Circuit

(Sample application: PAM drive, FET output)

Note: For applications where the motor has variable speed and control at low motor voltages is required, the base voltage of the

output interface transistor must be made low. In this case, a P-channel FET which can be used at low gate voltages must be

selected.

+

–

+

–

+

–

FG

FILTER

FG

SELECT

CLK

SELECT

OSC

ECL

1/8

1/128

1/384

1/512

LD

CLK

PWM

OSC

S/S

F/R

VREG

LVSD

TSD

COMP

PWM

LOGIC

SD

OSC

HALL LOGIC

HALL

HYS AMP

CURR

LIM

PRI

DRIVER

PLL

+

+

+

VREG

FGIN

–

FGIN

+

CLKIN

CLKOUT

XI

XO

CPWM

VREG

S/S

F/R

CSD

CLKSEL

FGSEL

IN1+

IN1–

IN2+

IN2–

IN3+

IN3– SOFT

GND

LIM

VCC

RF

WH

WL

VH

VL

UH

UL

TOC

EO

EI

PWM

OUT

VREG

VCC

PD

LD1

LD2

VREG

24V

12V

A11596