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LC6529F Datasheet(PDF) 21 Page - Sanyo Semicon Device

Part # LC6529F
Description  4-Bit Microcomputer for Small-Scale Control Applications
PDF  39 Pages
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Manufacturer  SANYO [Sanyo Semicon Device]
Direct Link  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC6529F Datasheet(HTML) 21 Page - Sanyo Semicon Device

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Electrical Characteristics at Ta = –40 to +85°C, VSS = 0 V, VDD = 2.2 to 6.0 V
Note: * The RC oscillator and external clock options require a Schmidt trigger configuration for OSC1.
No. 5117-21/39
LC6529N, LC6529F, LC6529L
Parameter
Symbol
Conditions
min
typ
max
Unit
Open-drain (OD) configuration for port: With output
IIH1
N-channel transistor off. (Includes transistor’s leak
5.0
Input high level current
current.) VIN = 13.5 V
µA
IIH2
PE: Using port E configuration, VIN = VDD
1.0
IIH3
OSC1: Using external clock option, VIN = VDD
1.0
Open-drain (OD) configuration for port: With output
IIL1
N-channel transistor off. (Includes transistor’s leak
–1.0
current.) VIN = VSS
µA
Pull-up (PU) resistor configuration for port:
IIL2
With output N-channel transistor off. (Includes
–220
–71.5
transistor’s leak current.) VIN = VSS
Input low level current
Pull-up (PU) resistor configuration for port C:
IIL3
With output N-channel transistor off. (Includes
–6.00
–2.17
mA
transistor’s leak current.) VIN = VSS
IIL4
PE: Using port E configuration, VIN = VSS
–1.0
IIL5
RES: VIN = VSS
–45
–10
µA
IIL6
OSC1: Using external clock option, VIN = VSS
–1.0
Output high level voltage
VOH
Pull-up (PU) resistor configuration for port C:
VDD – 0.5
V
IOH = –50 µA
VOL1
PA, PC, PD: IOL = 3 mA
1.5
Output low level voltage
VOL2
PA, PC, PD: With IOL for each port less than
0.4
V
or equal to 1 mA, IOL = 1 mA
Hysteresis voltage
VHIS1
RES
0.1 VDD
V
VHIS2
OSC1*: Using RC oscillator or external clock option
0.1 VDD
Parameter
Symbol
Conditions
min
typ
max
Unit
[Current drain]
RC oscillator
IDD OP1
VDD: Figure 2, 400 kHz (typ)
0.4
1.0
IDD OP2
VDD: Figure 3, 4 MHz, 1/4 frequency divider
1.6
4.0
IDD OP3
VDD: Figure 3, 4 MHz, 1/4 frequency divider,
0.4
0.8
VDD = 2.2 V
IDD OP4
VDD: Figure 3, 2 MHz, 1/3 frequency divider
1.3
3.0
mA
Ceramic oscillator
IDD OP5
VDD: Figure 3, 2 MHz, 1/4 frequency divider
1.3
3.0
IDD OP6
VDD: Figure 3, 2 MHz, 1/3, 1/4 frequency divider
0.3
0.6
VDD = 2.2 V
IDD OP7
VDD: Figure 3, 800 kHz
1.1
2.6
IDD OP8
VDD: Figure 3, 400 kHz
0.9
2.4
VDD: 200 to 667 kHz, 1/1 frequency divider,
External clock
IDD OP9
600 to 2000 kHz, 1/3 frequency divider,
1.0
2.5
mA
800 to 2667 kHz, 1/4 frequency divider
IDD st1
VDD: With output N-channel transistor off and
0.05
10
Standby operation
port level = VDD, VDD = 6 V
µA
IDD st2
VDD: With output N-channel transistor off and
0.025
5
port level = VDD, VDD = 2.2 V
[Oscillator characteristics]
RC oscillator Oscillator frequency
fMOSC
OSC1, OSC2: Figure 2, Cext = 220 pF ± 5%,
275
400
577
kHz
Rext = 12.0 k
Ω ± 1%
[Oscillator characteristics] (Ceramic oscillator)
OSC1, OSC2: Figure 3, fO = 400 kHz
384
400
416
OSC1, OSC2: Figure 3, fO = 800 kHz
768
800
832
Oscillator frequency
fCFOSC*
OSC1, OSC2: Figure 3, fO = 2 MHz
1920
2000
2080
kHz
OSC1, OSC2: Figure 3, fO = 4 MHz,
3840
4000
4160
1/4 frequency divider
Figure 4, fO = 400 kHz
10
Oscillator stabilization interval
tCFS
Figure 4, fO = 800 kHz,
10
ms
fO = 2 MHz, 1/3, 1/4 frequency divider,
fO = 4 MHz, 1/4 frequency divider
Continued on next page.



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