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LC6529F Datasheet(PDF) 5 Page - Sanyo Semicon Device |
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LC6529F Datasheet(HTML) 5 Page - Sanyo Semicon Device |
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5 / 39 page  Pin Functions No. 5117-5/39 LC6529N, LC6529F, LC6529L Pin No. Symbol I/O Function Output driver type Options State after reset VDD VSS OSC1 OSC2 PA0 PA1 PA2 PA3 PC0 PC1 PC2 PC3 PD0 PD1 PD2 PD3 PE0/CMP0 PE1/CMP1 PE2/CMP2 PE3/CMP3 VREF0 VREF1 RES TEST — — I O I/O I/O I/O I I I I I Power supply. Normally +5 V. Power supply. 0 V. Pins for attaching external system clock oscillator circuit (RC or ceramic) • Bidirectional I/O port A0 to A3: 4-bit input (IP instruction), 4-bit output (OP instruction), 1-bit conditionals (BP and BNP instructions), 1-bit set and reset (SPB and RPB instructions) • PA3 also doubles as standby operation control. • Block chattering from entering PA3 during the HALT instruction execution cycle. • Bidirectional I/O port C0 to C3. Functions the same as PA0 to PA3 except that there is no the standby operation control. • Option controls whether output is high or low after reset. Bidirectional I/O port D0 to D3. Functions and options the same as PC0 to PC3. • When configured for comparator input: CMP0 and CMP1 use reference voltage VREF0; CMP2 and CMP3 use reference voltage VREF1. • 4-bit (CMP0 to 3) input (IP instruction) • 1-bit conditionals (BP and BNP instructions) • When configured for port E input: • 4-bit (E0-3) input (IP instruction) • 1-bit conditionals (BP and BNP instructions) • Comparator reference level inputs: CMP0 and CMP1 use reference voltage VREF0; CMP2 and CMP3 use reference voltage VREF1. • Connect to VSS when PE0/CMP0 to PE3/CMP3 configured as port E. • System reset input • Connect external capacitor for power up reset. • Low level input for a minimum of four clock cycles triggers a reset. Chip test pin. Normally connect to VSS. • N channel: sink current type • I/O voltage limit for open-drain configuration: max. +15 V • P channel: high- impedance pull-up type • N channel: sink current type • I/O voltage limit for open-drain configuration: max. +15 V • P channel: low- impedance pull-up type • N channel: sink current type • I/O voltage limit for open-drain configuration: max. +15 V • P channel: high- impedance pull-up type 1 1 1 1 4 4 4 4 4 2 1 1 — — High output (output N channel transistor off) High or low (option) High or low (option) — — 1. 2-pin RC oscillator circuit (1-pin external clock) 2. 2-pin ceramic oscillator circuit 3. Frequency divider options: 1/1, 1/3, 1/4 1. Open-drain output 2. Pull-up resistor • Choice of configuration 1. or 2. at bit level 1. Open-drain output 2. Pull-up resistor 3. High output after reset 4. Low output after reset • Choice of configuration 1. or 2. at bit level • Choice of configuration 3. or 4. at port (4-bit) level 1. Open-drain output 2. Pull-up resistor 3. High output after reset 4. Low output after reset • Choice of configuration 1. or 2. at bit level • Choice of configuration 3. or 4. at port (4-bit) level 1. Comparator input 2. Port E input 3. Without feedback resistor 4. With feedback resistor • Choice of configuration 1. or 2. at port (4-bit) level • Options 3. and 4. only available with 1. |
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