MIC502 datasheet(5/15 Pages) MICREL

5 / 15 page

Micrel, Inc.

MIC502

November 2006

M9999-112206

VOH

VOL

40%

60%

30%

100%

tSTARTUP

tPWM

Output

Duty Cycle

0.7VDD

0.3VDD

VT1

VT2

VSLP

100%

20%

60%

40%

30%

PWM

Range

VOT

VIH

VIL

VOH

VOL

VOUT

VOTF

100%

VDD

Figure 2. MIC502 Typical Power-Up System Behavior

Note H.

At power-on, the startup timer forces OUT on for 64 PWM cycles of the internal timebase (tPWM). This insures that the fan will start from a dead

stop.

Note I.

The PWM duty-cycle follows the higher of VT1 and VT2, in the case, VT1.

Note J.

The PWM duty-cycle follows VT1 as it increases.

Note K.

PWM duty-cycle is 100% (OUT constantly on) anytime VT1 > VPWM(max).

Note L.

/OTF is asserted anytime VT1 > VOT. (The fan continues to run at 100% duty-cycle).

Note M.

/OTF is deasserted when VT1 falls below VOT; duty-cycle once again follows VT1.

Note N.

Duty-cycle follows VT1 until VT1 < VT2, at which time VT2 becomes the controlling input signal. Note that VT1 is below VSLP but above VIH; so

normal operation continues. (Both VT1 and VT2 must be below VSLP to active sleep mode).

Note O.

All functions cease when VT1 < VIL; this occurs regardless of the state of VT2.

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