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PCF2123TS Datasheet(PDF) 26 Page - NXP Semiconductors

Part # PCF2123TS
Description  SPI Real time clock/calendar Time keeping application
PDF  63 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF2123TS Datasheet(HTML) 26 Page - NXP Semiconductors

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PCF2123
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 27 April 2011
26 of 63
NXP Semiconductors
PCF2123
SPI Real time clock/calendar
8.7.1 Minute and second interrupts
The pulse generator for the minute and second interrupt operates from an internal 64 Hz
clock and consequently generates a pulse of 1
⁄
64 second in duration.
If the MSF flag is cleared before the end of the INT pulse, then the INT pulse is shortened.
This allows the source of a system interrupt to be cleared immediately it is serviced, i.e.,
the system does not have to wait for the completion of the pulse before continuing; see
Figure 17. Instructions for clearing MSF are given in Section 8.6.5.
The timing shown for clearing bit MSF in Figure 17 is also valid for the non-pulsed
interrupt mode i.e. when bit TI_TP = 0, INT may be shortened by setting both MI and SI or
MSF to logic 0.
8.7.2 Countdown timer interrupts
The generation of interrupts from the countdown timer is controlled via bit TIE.
The pulse generator for the countdown timer interrupt also uses an internal clock, but this
time it is dependent on the selected source clock for the countdown timer and on the
countdown value n. As a consequence, the width of the interrupt pulse varies (see
Table 34).
[1]
n = loaded countdown value. Timer stopped when n = 0.
If the TF flag is cleared before the end of the INT pulse, then the INT pulse is shortened.
This allows the source of a system interrupt to be cleared immediately it is serviced, i.e.,
the system does not have to wait for the completion of the pulse before continuing (see
Figure 18). Instructions for clearing MSF can be found in Section 8.6.5.
(1) Indicates normal duration of INT pulse (bit TI_TP = 1)
Fig 17. Example of shortening the INT pulse by clearing the MSF flag
001aaf908
58
seconds counter
MSF
INT
SCL
instruction
59
CLEAR INSTRUCTION
8th clock
(1)
Table 34.
INT operation (bit TI_TP = 1)
Source clock (Hz)
INT period (s)
n = 1[1]
n > 1
4096
1
⁄
8192
1
⁄
4096
64
1
⁄
128
1
⁄
64
1
1
⁄
64
1
⁄
64
1
⁄
60
1
⁄
64
1
⁄
64



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