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PCF2123TS Datasheet(PDF) 42 Page - NXP Semiconductors |
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PCF2123TS Datasheet(HTML) 42 Page - NXP Semiconductors |
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42 / 63 page ![]() PCF2123 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 5 — 27 April 2011 42 of 63 NXP Semiconductors PCF2123 SPI Real time clock/calendar 13. Dynamic characteristics Table 45. SPI-bus characteristics VSS =0V; Tamb = −40 °C to +85 °C. All timing values are valid within the operating supply voltage and temperature range and referenced to VIL and VIH with an input voltage swing of VSS to VDD. Symbol Parameter Conditions VDD = 1.6 V VDD = 2.4 V VDD = 3.3 V VDD = 5.0 V Unit Min Max Min Max Min Max Min Max Timing characteristics (see Figure 28) fclk(SCL) SCL clock frequency - 2.9 - 4.54 - 5.71 - 8.0 MHz tSCL SCL time 345 - 220 - 175 - 125 - ns tclk(H) clock HIGH time 90 - 50 - 45 - 40 - ns tclk(L) clock LOW time 200 - 120 - 95 - 70 - ns tr rise time for SCL signal - 100 - 100 - 50 - 50 ns tf fall time for SCL signal - 100 - 100 - 50 - 50 ns tsu(CE) CE set-up time 40 - 35 - 30 - 25 - ns th(CE) CE hold time 40 - 30 - 25 - 15 - ns trec(CE) CE recovery time 30 - 25 - 20 - 15 - ns tw(CE) CE pulse width measured after valid subaddress is received - 0.99 - 0.99 - 0.99 - 0.99 s tsu set-up time set-up time for SDI data 10 - 5 -3 -2 -ns th hold time hold time for SDI data 25 - 10 - 8 - 5 - ns td(R)SDO SDO read delay time bus load = 50 pF - 190 - 108 - 85 - 60 ns tdis(SDO) SDO disable time no load value; bus will be held up by bus capacitance; use RC time constant with application values - 70 - 45 - 40 - 27 ns tt(SDI-SDO) transition time from SDI to SDO to avoid bus conflict 0 - 0 - 0 - 0 - ns |
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