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MAX6695 Datasheet(PDF) 13 Page - Maxim Integrated Products |
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MAX6695 Datasheet(HTML) 13 Page - Maxim Integrated Products |
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13 / 19 page ![]() begun, after which the device returns to standby mode. If a conversion is in progress when a one-shot com- mand is received, the command is ignored. If a one- shot command is received in autoconvert mode (RUN/STOP bit = 0) between conversions, a new con- version begins, the conversion rate timer is reset, and the next automatic conversion takes place after a full delay elapses. Fault Queue Function To avoid false triggering of the MAX6695/MAX6696 in noisy environments, a fault queue is provided, which can be enabled by setting bit 5 (configuration register) to 1. Four channel 1 fault or two channel 2 fault events must occur consecutively before the fault output (OT2) becomes active. Any reading that breaks the sequence resets the fault queue counter. If there are three over- limit readings followed by a within-limit reading, the remote channel 1 fault queue counter is reset. Configuration Byte Functions The configuration byte register (Table 6) is a read-write register with several functions. Bit 7 is used to mask (disable) ALERT interrupts. Bit 6 puts the device into software standby mode (STOP) or autonomous (RUN) mode. Bit 5, when 1, enables the Fault Queue. Bit 4 is reserved. Bit 3 is used to select either remote channel 1 or remote channel 2 for reading temperature data or for setting or reading temperature limits. Bit 2 disables the SMBus timeout, as well as the Alert Response. Bit 1 masks ALERT interrupt due to channel 2 when high. Bit 0 masks ALERT interrupt due to channel 1 when high. Status Byte Functions The status registers (Tables 7 and 8) indicate which (if any) temperature thresholds have been exceeded and if there is an open-circuit fault detected with the exter- nal sense junctions. Status register 1 also indicates whether the ADC is converting. After POR, the normal state of the registers’ bits is zero (except bit 7 of status register 1), assuming no alert or overtemperature con- ditions are present. Bits 0 through 6 of status register 1 and bits 1 through 7 of status register 2 are cleared by any successful read of the status registers, unless the fault persists. The ALERT output follows the status flag bit. Both are cleared when successfully read, but if the condition still exists, they reassert at the end of the next conversion. The bits indicating OT1 and OT2 are cleared only on reading status even if the fault conditions still exist. Reading the status byte does not clear the OT1 and OT2 outputs. One way to eliminate the fault condition is for the measured temperature to drop below the tem- perature threshold minus the hysteresis value. Another way to eliminate the fault condition is by writing new values for the RWO2E, RWO2I, RWO1E, RWO1I, or HYST registers so that a fault condition is no longer present. When autoconverting, if the THIGH and TLOW limits are close together, it is possible for both high-temp and low-temp status bits to be set, depending on the amount of time between Status Read operations. In these circumstances, it is best not to rely on the status bits to indicate reversals in long-term temperature changes. Instead, use a current temperature reading to establish the trend direction. Dual Remote/Local Temperature Sensors with SMBus Serial Interface ______________________________________________________________________________________ 13 BIT NAME POR STATE FUNCTION 7(MSB) MASK1 0 Mask ALERT interrupts when 1. 6 RUN/STOP 0 Standby mode control bit. If 1, immediately stops converting and enters standby mode. If zero, it converts in either one-shot or timer mode. 5 Fault Queue 0 Fault queue enables when 1. When set to 1, four consecutive faults must occur before OT2 output is asserted. 4 RFU 0 Reserved. 3 Remote 2 Select 0 0: Read/write remote 1 temperature and set-point values. 1: Read/write remote 2 temperature and set-point values. 2 SMB Timeout Disable 0 When set to 1, it disables the SMBus timeout, as well as the alert response. 1 MASK Alert Channel 2 0 When set to 1, it masks ALERT interrupt due to channel 2. 0 MASK Alert Channel 1 0 When set to 1, it masks ALERT interrupt due to channel 1. Table 6. Configuration Byte Functions |
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