MC68340 datasheet(32/962 Pages) MOTOROLA

32 / 962 page

Introduction

1-2

MC68360 USER’S MANUAL

MOTOROLA

—Glueless Interface to DRAM Single In-Line Memory Modules (SIMMs), Static Ran-

dom-Access Memory (SRAM), Electrically Programmable Read-Only Memory

(EPROM), Flash EPROM, etc.

—Four CAS lines, Four WE lines, One OE line

—Boot Chip Select Available at Reset (Options for 8-, 16-, or 32-Bit Memory)

—Special Features for MC68040 Including Burst Mode Support

• Four General-Purpose Timers

—Superset of MC68302 Timers

—Four 16-Bit Timers or Two 32-Bit Timers

—Gate Mode Can Enable/Disable Counting

• Two Independent DMAs (IDMAs)

—Single Address Mode for Fastest Transfers

—Buffer Chaining and Auto Buffer Modes

—Automatically Performs Efficient Packing

—32-Bit Internal and External Transfers

• System Integration Module (SIM60)

—Bus Monitor

—Double Bus Fault Monitor

—Spurious Interrupt Monitor

—Software Watchdog

—Periodic Interrupt Timer

—Low Power Stop Mode

—Clock Synthesizer

—Breakpoint Logic Provides On-Chip Hardware Breakpoints

—External Masters May Use On-Chip Features Such As Chip Selects

—On-Chip Bus Arbitration with No Overhead for Internal Masters

—IJTAG Test Access Port

• Interrupts

—Seven External IRQ Lines

—12 Port Pins with Interrupt Capability

—16 Internal Interrupt Sources

—Programmable Priority Between SCCs

—Programmable Highest Priority Request

• Communications Processor Module (CPM)

—RISC Controller

—Many New Commands (e.g., Graceful Stop Transmit, Close RxBD)

—224 Buffer Descriptors

—Supports Continuous Mode Transmission and Reception on All Serial Channels

—2.5 Kbytes of Dual-Port RAM

—14 Serial DMA (SDMA) Channels

—Three Parallel I/O Registers with Open-Drain Capability

—Each Serial Channel Can Have Its Own Pins (NMSI Mode)

• Four Baud Rate Generators

MC68340 Datasheet(PDF) 32 Page - Motorola, Inc

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