AD9837 datasheet(4/28 Pages) AD

Part #	AD9837

Description	Low Power, 8.5 mW, 2.3 V to 5.5 V, Programmable Waveform Generator

PDF	28 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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4 / 28 page

AD9837

Rev. 0 | Page 4 of 28

TIMING CHARACTERISTICS

VDD = 2.3 V to 5.5 V, AGND = DGND = 0 V, unless otherwise noted.

Table 2.

Parameter1

Limit at TMIN to TMAX

Unit

Description

62.5

ns min

MCLK period (fMCLK = 16 MHz)

ns min

MCLK high duration (fMCLK = 16 MHz)

ns min

MCLK low duration (fMCLK = 16 MHz)

ns min

SCLK period

ns min

SCLK high duration

ns min

SCLK low duration

ns min

FSYNC to SCLK falling edge setup time

ns min

SCLK falling edge to FSYNC rising edge time

t4 − 5

ns max

ns min

Data setup time

t10

ns min

Data hold time

t11

ns min

SCLK high to FSYNC falling edge setup time

1 Guaranteed by design; not production tested.

Timing Diagrams

MCLK

Figure 2. Master Clock

t10

D14

SCLK

FSYNC

SDATA

D15

t11

Figure 3. Serial Timing

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