ADP2127 datasheet(11/20 Pages) AD

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ADP2126/ADP2127

Rev. A | Page 11 of 20

THEORY OF OPERATION

SHOOT-

THROUGH

CONTROL

LOGIC

AND

PFM/PWM

CONTROL

THERMAL

SHUTDOWN

SOFT START

BANDGAP

AGND

VOUT

AGND

6MHz

OSCILLATOR

THRESHOLD

DETECT*

THRESHOLD

DETECT

VOUT

DISCHARGE

CLK

DETECT

SHORT-CIRCUIT

PROTECTION

COMPENSATION

EAMP

RDSCHG

110Ω

RAMP

V(VIN)

ZXCOMP

PILIM

PDRIVE

PWM

COMP

PVIN

CIN

AVIN

NDRIVE

PREF

COUT

VOUT

1.20V OR

1.26V

PGND

VIN

GND

AGND

NREF

EXTCLK

MODE

OFF

PWM

AUTO

ADP2126/ADP2127

*THE LOGIC HIGH ENABLE FEATURE IS ONLY AVAILABLE ON CERTAIN MODELS.

VIN

2.1V TO 5.5V

Figure 29. Internal Block Diagram

OVERVIEW

The ADP2126/ADP2127 are high efficiency, synchronous, step-

down, dc-to-dc regulators that operate from a 2.1 V to 5.5 V

input voltage. They provide up to 500 mA of continuous output

current at a fixed output voltage. The 6 MHz operating frequency

enables the use of tiny external components. External control

for mode selection provides a power-saving option. The internal

control schemes of the ADP2126/ADP2127 give excellent

stability and transient response. Other internal features, such

as cycle-by-cycle peak current limit, soft start, undervoltage

lockout, output-to-ground short-circuit protection, and thermal

shutdown provide protection for internal circuit components.

EXTERNAL CLOCK (EXTCLK) ENABLE

The ADP2126/ADP2127 are enabled by a 6 MHz to 27 MHz

external clock signal applied to the EXTCLK pin. Certain models

can also be enabled with a logic high signal (see Figure 3, Figure 4,

and Figure 29). When the ADP2126/ ADP2127 are enabled, the

converter is able to power up, and the output voltage rises to its

nominal value. When the external clock is not switching and in

a low logic state, the ADP2126/ADP2127 stop regulating and

shut down to draw less than 0.3 μA (typical) from the source.

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