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LTC2635 Datasheet(PDF) 23 Page - Linear Technology

Part # LTC2635
Description  Quad 12-/10-/8-Bit I2C VOUT DACs with 10ppm/째C Reference
PDF  32 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2635 Datasheet(HTML) 23 Page - Linear Technology

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LTC2635

2635fb
operation
Write Word Protocol
The master initiates communication with the LTC2635
with a START condition and a 7-bit slave address followed
by the Write bit (W) = 0. The LTC2635 acknowledges by
pulling the SDA pin low at the 9th clock if the 7-bit slave
address matches the address of the part (set by CA0, CA1
or CA2) or the global address. The master then transmits
three bytes of data. The LTC2635 acknowledges each byte
of data by pulling the SDA line low at the 9th clock of each
data byte transmission. After receiving three complete
bytes of data, the LTC2635 executes the command speci-
fied in the 24-bit input word.
If more than three data bytes are transmitted after a valid
7-bit slave address, the LTC2635 does not acknowledge
(NAK) the extra bytes of data (SDA is high during the 9th
clock).
TheformatofthethreedatabytesisshowninFigure3.The
first byte of the input word consists of the 4-bit command,
followed by the 4-bit DAC address. The next two bytes
contain the 16-bit data word, which consists of the 12-,
10- or 8-bit input code, MSB to LSB, followed by 4, 6 or 8
don’t-care bits (LTC2635-12, -10 and -8, respectively). A
typical LTC2635 write transaction is shown in Figure 4.
The command bit assignments (C3-C0) and address (A3-
A0) assignments are shown in Tables 3 and 4. The first
four commands in the table consist of write and update
operations. A write operation loads a 16-bit data word
from the 32-bit shift register into the input register. In an
update operation, the data word is copied from the input
register to the DAC register. Once copied into the DAC
register, the data word becomes the active 12-, 10-, or
8-bit input code, and is converted to an analog voltage at
the DAC output. Write to and Update combines the first
two commands. The Update operation also powers up the
DAC if it had been in power-down mode. The data path
and registers are shown in the Block Diagram.
Table 3. Command Codes
COMMAND*
C3
C2 C1 C0
0
0
0
0 Write to Input Register n
0
0
0
1 Update (Power Up) DAC Register n
0
0
1
0 Write to Input Register n, Update (Power Up) All
0
0
1
1 Write to and Update (Power Up) DAC Register n
0
1
0
0 Power Down n
0
1
0
1 Power Down Chip (All DAC’s and Reference)
0
1
1
0 Select Internal Reference (Power Up Reference)
0
1
1
1 Select External Reference (Power Down Internal
Reference)
1
1
1
1 No Operation
*Command codes not shown are reserved and should not be used.
Table 4. Address Codes
ADDRESS (n)*
A3
A2 A1 A0
0
0
0
0 DAC A
0
0
0
1 DAC B
0
0
1
0 DAC C
0
0
1
1 DAC D
1
1
1
1 ALL DACs
* Address codes not shown are reserved and should not be used.
Reference Modes
For applications where an accurate external reference is
either not available, or not desirable due to limited space,
the LTC2635 has a user-selectable, integrated reference.
The integrated reference voltage is internally amplified by
2x to provide the full-scale DAC output voltage range. The
LTC2635-LMI/-LMX/-LMO/-LZprovidesafull-scaleoutput
of2.5V.TheLTC2635-HMI/-HZprovidesafull-scaleoutput
of 4.096V. The internal reference can be useful in applica-
tionswherethesupplyvoltageispoorlyregulated.Internal
Referencemodecanbeselectedbyusingcommand0110b,
and is the power-on default for LTC2635-HZ/-LZ, as well
as for LTC2635-HMI/-LMI/-LMO.



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