HT67F60 datasheet(142/242 Pages) HOLTEK

142 / 242 page

Rev. 1.50

142

March 06 , 2012

Rev. 1.50

143

March 06 , 2012

HT67F30/HT67F40/HT67F50/HT67F60

TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPRO

Counter Value

CCRP

CCRA

TnON

TnPAU

TnAPOL

CCRA Int.

Flag TnAF

CCRB Int.

Flag TnBF

TPnA Pin

(TnAOC=1)

Time

Counter Cleared by CCRP

Pause

Resume

Stop

Counter

Restart

TnCCLR = 0;

TnAM [1:0] = 10, TnBM [1:0] = 10;

TnPWM [1:0] = 00

Output Pin

Reset to Initial value

Output controlled by

other pin-shared function

Output Inverts

when TnAPOL

is high

CCRB

CCRP Int.

Flag TnPF

TPnB Pin

(TnBOC=1)

TPnB Pin

(TnBOC=0)

Duty Cycle

set by CCRA

Duty Cycle

set by CCRB

PWM Period set by CCRP

Duty Cycle

set by CCRA

Duty Cycle

set by CCRA

ETM PWM Mode — Edge Aligned

Note: 1. Here TnCCLR=0 therefore CCRP clears counter and determines the PWM period

2. The internal PWM function continues running even when TnAIO [1:0] (or

TnBIO [1:0]) = 00 or 01

3. CCRA controls the TPnA PWM duty and CCRB controls the TPnB PWM duty

Counter Value

CCRA

TnON

TnPAU

TnBPOL

CCRB Int.

Flag TnBF

Time

Counter Cleared by CCRA

Pause

Resume

Stop

Counter

Restart

TnCCLR = 1; TnBM [1:0] = 10;

TnPWM [1:0] = 00

Output Pin

Reset to

Initial value

Output controlled by

other pin-shared function

Output Inverts

when TnBPOL

is high

CCRB

CCRP Int.

Flag TnPF

TPnB Pin

(TnBOC=1)

TPnB Pin

(TnBOC=0)

Duty Cycle

set by CCRB

PWM Period set by CCRA

ETM PWM Mode — Edge Aligned

Note: 1. Here TnCCLR=1, therefore CCRA clears the counter and determines the PWM period

2. The internal PWM function continues running even when TnBIO [1:0] = 00 or 01

3. The CCRA controls the TPnB PWM period and CCRB controls the TPnB PWM duty

4. Here the TM pin control register should not enable the TPnA pin as a TM output pin.

HT67F60 Datasheet(PDF) 142 Page - Holtek Semiconductor Inc

HT67F60 Datasheet(HTML) 142 Page - Holtek Semiconductor Inc

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