HT67F60 datasheet(143/242 Pages) HOLTEK

143 / 242 page

HT67F30/HT67F40/HT67F50/HT67F60

TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPROM

Rev. 1.50

142

March 06 , 2012

Rev. 1.50

143

March 06 , 2012

Counter Value

CCRP

CCRA

TnON

TnPAU

TnAPOL

CCRA Int.

Flag TnAF

CCRB Int.

Flag TnBF

TPnA Pin

(TnAOC=1)

Time

Pause

Resume

Stop

Counter

Restart

TnCCLR = 0;

TnAM [1:0] = 10, TnBM [1:0] = 10;

TnPWM [1:0] = 11

Output Pin

Reset to Initial value

Output controlled by

Other pin-shared function

Output Inverts

when TnAPOL

is high

CCRB

CCRP Int.

Flag TnPF

TPnB Pin

(TnBOC=1)

TPnB Pin

(TnBOC=0)

Duty Cycle set by CCRA

Duty Cycle set by CCRB

PWM Period set by CCRP

ETM PWM Mode — Centre Aligned

Note: 1. Here TnCCLR=0 therefore CCRP clears the counter and determines the PWM period

2. TnPWM [1:0] =11 therefore the PWM is centre aligned

3. The internal PWM function continues running even when TnAIO [1:0] (or

TnBIO [1:0]) = 00 or 01

4. CCRA controls the TPnA PWM duty and CCRB controls the TPnB PWM duty

5. CCRP will generate an interrupt request when the counter decrements to its zero value

Counter Value

CCRA

TnON

TnPAU

TnBPOL

CCRA Int.

Flag TnAF

CCRB Int.

Flag TnBF

Time

Pause

Resume

Stop

Counter

Restart

TnCCLR = 1; TnBM [1:0] = 10;

TnPWM [1:0] = 11

Output Pin

Reset to Initial value

Output controlled

by other pin-shared

function

CCRB

TPnB Pin

(TnBOC=1)

TPnB Pin

(TnBOC=0)

Duty Cycle set by CCRB

PWM Period set by CCRA

Output Inverts

when TnBPOL is high

CCRP Int.

Flag TnPF

ETM PWM Mode — Centre Aligned

Note: 1. Here TnCCLR=1 therefore CCRA clears the counter and determines the PWM period

2. TnPWM [1:0] =11 therefore the PWM is centre aligned

3. The internal PWM function continues running even when TnBIO [1:0] = 00 or 01

4. CCRA controls the TPnB PWM period and CCRB controls the TPnB PWM duty

5. CCRP will generate an interrupt request when the counter decrements to its zero value

HT67F60 Datasheet(PDF) 143 Page - Holtek Semiconductor Inc

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