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MICRF505L Datasheet(PDF) 37 Page - Micrel Semiconductor |
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MICRF505L Datasheet(HTML) 37 Page - Micrel Semiconductor |
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37 / 43 page  Micrel MICRF505BML/YML August 2006 37 M9999-092904 +1 408-944-0800 2 LD_en Lock detect function (1=enable) 1 PF_FC1 Prefilter corner frequency 2.bit Ref. Table 5 0 PF_FC0 Prefilter corner frequency 1.bit Ref. Table 5 0000010 7 CP_HI High charge-pump current (0=125uA, 1=500uA) 6 SC_by Bypass of Switched Capacitor filter (1=enable) 5 VCO_by “0” mandatory. Bypass of VCO (1=enable) 4 PA_by Bypass of PA (1=enable) 3 OUTS3 Test pins output 4.bit Ref. Table 8 2 OUTS2 Test pins output 3.bit Ref. Table 8 1 OUTS1 Test pins output 2.bit Ref. Table 8 0 OUTS0 Test pins output 1.bit Ref. Table 8 0000011 7 IFBias_s “1” mandatory. 6 IFA_HG “1” mandatory. High gain setting in preamplifier 5 VCO_Bias_s “0” mandatory. Select separate bias for VCO on VCOBias pin (1=enable) 4 VCO_IB2 VCO bias current setting, 3. bit (111 = highest current) 3 VCO_IB1 VCO bias current setting, 2. bit 2 VCO_IB0 VCO bias current setting, 1. bit 1 VCO_freq1 Frequency setting of VCO, 2. bit (11=highest frequency) 0 VCO_freq0 Frequency setting of VCO, 1.bit 0000100 7 Mod_F2 Modulator filter setting, MSB (0=filter active) 6 Mod_F1 Modulator filter setting 5 Mod_F0 Modulator filter setting, LSB 4 Mod_I4 Modulator current setting, MSB 3 Mod_I3 Modulator current setting 2 Mod_I2 Modulator current setting 1 Mod_I1 Modulator current setting 0 Mod_I0 Modulator current setting, LSB 0000101 7 --------- Reserved/not in use 6 --------- Reserved/not in use 5 Mod_FHG “0” mandatory. Modulator Test bit. 4 Mod_shape “1” mandatory. Modulator shape enable 3 Mod_A3 Modulator attenuator setting, MSB (1=attenuator active) 2 Mod_A2 Modulator attenuator setting 1 Mod_A1 Modulator attenuator setting 0 Mod_A0 Modulator attenuator setting, LSB 0000110 7 --------- Reserved/not in use 6 Mod_clkS2 Modulator clock setting 3.bit, MSB 5 Mod_clkS1 Modulator clock setting 2.bit 4 Mod_clkS0 Modulator clock setting 1.bit, LSB 3 BitSync_clkS2 BitSync clock setting 3.bit, MSB 2 BitSync_clkS1 BitSync clock setting 2.bit 1 BitSync_clkS0 BitSync clock setting 1.bit, LSB 0 BitRate_clkS2 Bitrate clock setting 3.bit, MSB 0000111 7 BitRate_clkS1 Bitrate clock setting 2.bit 6 BitRate_clkS0 Bitrate clock setting 1.bit. LSB: 5 RefClk_K5 Reference clock divider 6.bit, MSB 4 RefClk_K4 Reference clock divider 5.bit 3 RefClk_K3 Reference clock divider 4.bit 2 RefClk_K2 Reference clock divider 3.bit 1 RefClk_K1 Reference clock divider 2.bit 0 RefClk_K0 Reference clock divider 1.bit, LSB 0001000 7 SC_HI “1” mandatory. High current in Switched Cap filter 6 ScClk_X2 “1” mandatory. Switched Cap clock multiplied by two 5 ScClk5 SwitchCap clock divider 6.bit MSB |
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