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MIC5162 Datasheet(PDF) 9 Page - Micrel Semiconductor |
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MIC5162 Datasheet(HTML) 9 Page - Micrel Semiconductor |
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9 / 24 page ![]() Micrel, Inc. MIC5162 March 2010 9 M9999-033110 where I_SINK is the average sink current. In a typical 3A peak SSTL_2 circuit, power considerations for MOSFET selection would occur as follows. PD = (VDDQ −VTT) × I_SOURCE PD = (2.5V −1.25V) × 1.6A PD = 2W This typical SSTL_2 application would require both high- side and low-side N-Channel MOSFETs to be able to handle 2 Watts each. In applications where there is excessive power dissipation, multiple N-Channel MOSFETs may be placed in parallel. These MOSFETs will share current, distributing power dissipation across each device. The maximum MOSFET die (junction) temperature limits maximum power dissipation. The ability of the device to dissipate heat away from the junction is specified by the junction-to-ambient (θJA) thermal resistance. This is the sum of junction-to-case (θJC) thermal resistance, case- to-sink (θCS) thermal resistance and sink-to-ambient (θSA) thermal resistance; θJA = θJC + θCS + θSA In the example of a 3A peak SSTL_2 termination circuit, a D-pack N-Channel MOSFET that has a maximum junction temperature of 125°C has been selected. The device has a junction-to-case thermal resistance of 1.5°C/Watt. The application has a maximum ambient temperature of 60°C. The required junction-to-ambient thermal resistance can be calculated as follows: D A J JA P T T − = θ Where TJ is the maximum junction temperature, TA is the maximum ambient temperature and PD is the power dissipation. In this example: D A J JA P T T − = θ W 2 C 60 C 125 θJA ° ° = - W / C 5 . 32 θJA ° = This shows that our total thermal resistance must be better than 32.5°C/W. Since the total thermal resistance is a combination of all the individual thermal resistances, the amount of heat sink required can be calculated as follows: θSA = θJA − (θJC + θCS) In this example: ( ) C 5 . 0 W / C 5 . 1 W / C 5 . 32 θSA ° + ° ° = - W / C 5 . 30 θ SA ° = In most cases, case-to-sink thermal resistance can be assumed to be about 0.5°C/W. The SSTL termination circuit for this example, using 2 D- pack N-Channel MOSFETs (one high side and one on the low side) will require at least a 30.5°C/W heat sink per MOSFET. This may be accomplished with an external heat sink or even just the copper area that the MOSFET is soldered to. In some cases, airflow may also be required to reduce thermal resistance. MOSFET Gate Threshold N-Channel MOSFETs require an enhancement voltage greater than its source voltage. Typical N-Channel MOSFETs have a gate-source threshold (VGS) of 1.8V and higher. Since the source of the high side N-Channel is connected to VTT, the MIC5162 VCC pin requires a voltage greater than the VGS voltage. For example, the SSTL_2 termination circuit has a VTT voltage of 1.25V. For an N-Channel that has a VGS rating of 2.5V, the VCC voltage can be as low as 3.75V, but not less than 3.0V. With an N-Channel that has a 4.5V VGS, the minimum VCC required is 5.75V. Although these N-Channels are driven below their full enhancement threshold, it is recommended that the VCC voltage has enough margin to be able to fully enhance the MOSFETs for large signal transient response. In addition, low gate thresholds MOSFETs are recommended to reduce the VCC requirements. |
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