AD5735

Data Sheet

Rev. B | Page 38 of 48

Status Register

The status register is a read-only register. This register contains

any fault information, as a well as a ramp active bit (Bit D9) and

a user toggle bit (Bit D11). When the STATREAD bit in the

main control register is set, the status register contents can be

read back on the SDO pin during every write sequence. Alterna-

tively, if the STATREAD bit is not set, the status register can be

read using the normal readback operation (see the Readback

Operation section).

Table 32. Decoding the Status Register

MSB

LSB

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

DC-DCD DC-DCC DC-DCB DC-DCA User

toggle

PEC

error

Ramp

active

Over

temp

fault

fault

fault

fault

fault

fault

fault

fault

Table 33. Status Register Bit Descriptions

Bit Name

Description

DC-DCD

In current output mode, this bit is set if the dc-to-dc converter on Channel D cannot maintain compliance, for example, if

Functionality section for more information about the operation of this bit under this condition.

In voltage output mode, this bit is set if the dc-to-dc converter on Channel D is unable to regulate to 15 V as expected.

When this bit is set, it does not result in the FAULT pin going high.

DC-DCC

In current output mode, this bit is set if the dc-to-dc converter on Channel C cannot maintain compliance, for example, if

Functionality section for more information about the operation of this bit under this condition.

In voltage output mode, this bit is set if the dc-to-dc converter on Channel C is unable to regulate to 15 V as expected.

When this bit is set, it does not result in the FAULT pin going high.

DC-DCB

In current output mode, this bit is set if the dc-to-dc converter on Channel B cannot maintain compliance, for example, if

Functionality section for more information about the operation of this bit under this condition.

In voltage output mode, this bit is set if the dc-to-dc converter on Channel B is unable to regulate to 15 V as expected.

When this bit is set, it does not result in the FAULT pin going high.

DC-DCA

In current output mode, this bit is set if the dc-to-dc converter on Channel A cannot maintain compliance, for example, if

Functionality section for more information about the operation of this bit under this condition.

In voltage output mode, this bit is set if the dc-to-dc converter on Channel A is unable to regulate to 15 V as expected.

When this bit is set, it does not result in the FAULT pin going high.

User Toggle

User toggle bit. This bit is set or cleared via the software register and can be used to verify data communications, if needed.

PEC Error

Denotes a PEC error on the last data-word received over the SPI interface.

Ramp Active

This bit is set while any output channel is slewing (digital slew rate control is enabled on at least one channel).

Over Temp

This bit is set if the AD5735 core temperature exceeds approximately 150°C.