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DM8603 Datasheet(PDF) 39 Page - Davicom Semiconductor, Inc. |
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DM8603 Datasheet(HTML) 39 Page - Davicom Semiconductor, Inc. |
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39 / 107 page ![]() DM8603 10/100 Mbps 3-port Ethernet Switch Controller with MII / RMII Interface Preliminary datasheet 39 DM8603-12-DS-P01 November 8, 2010 7.3.3 Switch Control Register (212h) PHY_ADR REG_ADR ABS_ADR 10h 12h 212h Bit ROM Type Default Description 15:6 --- RO 0h RESERVED Write as 0h, ignore when read 5 12h.[5] PSE,RW 0b FDX_FLOW Flow Control Option When set In full duplex mode, if link partner’s flow control capability is disabled, the flow control of DM8603 corresponding port is also disabled. When this is “0”, the flow control is controlled by REG 08~0Ah.11h.[4]. 4:3 --- RO 00b RESERVED Write as 00b, ignore when read 2 12h.[2] PSE,RW 0b DIS_CRCC CRC Checking Disable 0: CRC checking is enabled 1: CRC checking is disabled 1:0 --- RO 00b RESERVED Write as 00b, ignore when read 7.3.4 Mirror Control Register (213h) PHY_ADR REG_ADR ABS_ADR 10h 13h 213h Bit ROM Type Default Description 15:11 --- RO 0h RESERVED Write as 0h, ignore when read 10 13h.[10] PSE, RW 0b MIRR_PAIR Mirror RX/TX Pair Mode Enable 0: Disable (default) 1: Enable 9:8 --- RO 00b RESERVED Write as 00b, ignore when read 7 13h.[7] PSE, RW 0b STAG_TXE Special Tag Transmit Enable 0: Doesn't insert the Special Tag for outgoing packets 1: Identifies the Special Tag for outgoing packets 6 13h.[6] PSE, RW 0b STAG_RXE Special Tag Receive Enable 0: Doesn't identify the Special Tag for incoming packets 1: Identifies the Special Tag for incoming packets 5 --- 0b RESERVED Write as 0b, ignore when read |
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