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MAX44005

RGB Color, Temperature,

and Infrared Proximity Sensor

transfer on the bus. A master device writes data to the

IC by transmitting the proper slave address followed by

the register address and then the data word. Each trans-

mit sequence is framed by a START (S) or REPEATED

START (Sr) condition and a STOP (P) condition. Each

word transmitted to the IC is 8 bits long and is followed

by an acknowledge clock pulse. A master reading data

from the IC transmits the proper slave address followed

by a series of nine SCL pulses. The IC transmits data on

SDA in sync with the master-generated SCL pulses. The

master acknowledges receipt of each byte of data. Each

read sequence is framed by a START or REPEATED

START condition, a not acknowledge, and a STOP condi-

tion. SDA operates as both an input and an open-drain

output. A pullup resistor, typically greater than 500I, is

required on the SDA bus. SCL operates as only an input.

A pullup resistor, typically greater than 500I, is required

on SCL if there are multiple masters on the bus, or if the

master in a single-master system has an open-drain SCL

output. Series resistors in line with SDA and SCL are

optional. Series resistors protect the digital inputs of the

IC from high-voltage spikes on the bus lines, and mini-

mize crosstalk and undershoot of the bus signal.

Bit Transfer

One data bit is transferred during each SCL cycle. The

data on SDA must remain stable during the high period

of the SCL pulse. Changes in SDA while SCL is high are

control signals. See the START and STOP Conditions sec-

START and STOP Conditions

SDA and SCL idle high when the bus is not in use. A mas-

ter initiates communication by issuing a START condition.

A START condition is a high-to-low transition on SDA with

SCL high. A STOP condition is a low-to-high transition on

SDA while SCL is high (Figure 4). A START condition from

the master signals the beginning of a transmission to the

IC. The master terminates transmission and frees the bus

by issuing a STOP condition. The bus remains active if

a REPEATED START condition is generated instead of a

STOP condition.

Figure 3. 2-Wire Interface Timing Diagram

Figure 4. START, STOP, and REPEATED START Conditions

Figure 5. Acknowledge

SCL

SDA

START

CONDITION

STOP

CONDITION

REPEATED

START CONDITION

START

CONDITION

SCL

SDA

SSrP

1

SCL

START

CONDITION

SDA

28

9

CLOCK PULSE FOR

ACKNOWLEDGMENT

ACKNOWLEDGE

NOT ACKNOWLEDGE