MPC5645S datasheet(114/146 Pages) FREESCALE

114 / 146 page

Qorivva MPC5645S Microcontroller Data Sheet, Rev. 8

114

Freescale Semiconductor

Figure 29. DDR read timing, DQSEN

Figure 30 provides the AC test load for the DDR bus.

Figure 30. DDR AC test load

4.18.5.1

2.5 V DDR1

Table 60. SSTL_2 Class II 2.5 V DDR DC Specifications

Symbol

Parameter

Condition

Min

Nom

Max

Units

Notes

SpecID

vddet

P I/O Supply Voltage

—

2.30

2.50

2.70

JESD8-9B

A5.1

vdd

P Core Supply Voltage

—

1.08

1.20

1.32

—

A5.2

Vref(dc)

P Input Reference Volt-

age

—

1.13

1.25

1.38

JESD8-9B

A5.3

Vtt

P Termination Voltage

—

Vref-0.04

vref

Vref+0.04

JESD8-9B

A5.4

Vih(dc)

C DC Input Logic High

—

Vref+0.15

—

vddet+0.3

JESD8-9B

A5.5

Vil(dc)

C DC Input Logic Low

—

-0.3

—

Vref-0.15

JESD8-9B

A5.6

Vih(ac)

C AC Input Logic High

—

Vref+0.31

—

JESD8-9B

A5.7

Vil(ac)

C AC Input Logic Low

—

Vref-0.31

JESD8-9B

A5.8

Iin

P Pad input Leakage

Current

—

+/-10

µA

—

A5.9

MCK

DQS (in)

tOS

tOH

Command

Address

Read

tDQSEN (min)

tDQSEN

Output

Z0 =50 

RL = 50 

VDD_MEM_IO/2

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