MPC5645S datasheet(116/146 Pages) FREESCALE

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Qorivva MPC5645S Microcontroller Data Sheet, Rev. 8

116

Freescale Semiconductor

4.18.5.2

1.8 V DDR2

The SSTL_18 differential input switch point is at vref = 0.50*vddet.

Note that the Jedec SSTL_18 specifications (JESD8-15a) for a SSTL interface for class II operation supersedes any

specification in this document.

The SSTL_18 Class II output with ipp_sre[2:0] set to enabling sstl_2 1.8V DDR2 mode, at the destination, have a rise/fall time

(10%-90%) between 0.4 ns and 1.0 ns over process, voltage, and temperature driving a 70 ohm transmission line with 0.167 ns

Table 61. SSTL_18 Class II 1.8 V DDR2 DC Specifications

Symbol C

Parameter

Condi-

tion

Min

Nom

Max

Units

Notes

SpecID

vddet

I/O Supply Voltage

—

1.7

1.8

1.9

JESD8-15A

A5.14

vdd

Core Supply Voltage

—

1.08

1.2

1.32

A5.15

Vref(dc)

Input Reference Volt-

age

—

0.833

0.9

1.0869

JESD8-15A

A5.16

Vtt

Termination Voltage

—

Vref-0.04

Vref

Vref+0.04

JESD8-15A

A5.17

Vih(dc)

C DC Input Logic High

—

Vref+0.125

—

vddet+0.3

JESD8-15A

A5.18

Vil(dc)

C DC Input Logic Low

—

-0.3

—

Vref-0.125

JESD8-15A

A5.19

Vih(ac)

C AC Input Logic High

—

Vref+0.25

—

JESD8-15A

A5.20

Vil(ac)

C AC Input Logic Low

—

Vref-0.25

JESD8-15A

A5.21

Iin

Pad input Leakage

Current

—

+/-10

µA

—

A5.22

Voh

C Output High Voltage

Level

—

vddet-0.28

—

A5.23

Vol

C Output Low Voltage

Level

—

0.28

—

A5.24

Ioh(dc)

C Output min source dc

current

Vout=Voh

-13.4

—

JESD8-15A

vddet = 1.7V

Voh = 1.42V

A5.25

Iol(dc)

C Output min sink dc

current

Vout=Vol

13.4

—

JESD8-15A

vddet = 1.7V

Vol = 0.28V

A5.26

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