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MPC5645S Datasheet(PDF) 119 Page - Freescale Semiconductor, Inc |
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MPC5645S Datasheet(HTML) 119 Page - Freescale Semiconductor, Inc |
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119 / 146 page ![]() Qorivva MPC5645S Microcontroller Data Sheet, Rev. 8 Freescale Semiconductor 119 4.18.7 External Interrupt (IRQ) and Non-Maskable Interrupt (NMI) Timing Figure 34. IRQ and NMI Timing 4.18.8 eMIOS timing Table 64. IRQ and NMI Timing Num Symbol C Characteristic Min. Value Max. Value Unit SpecID 1tIPWL CC1 1 Parameter values guaranteed by design. D IRQ/NMI Pulse Width Low 200 — ns A7.1 2tIPWH CC1 D IRQ/NMI Pulse Width High 200 — ns A7.2 3tICYC CC1 D IRQ/NMI Edge to Edge Time2 2 Applies when IRQ/NMI pins are configured for rising edge or falling edge events, but not both. 400 — ns A7.3 Table 65. eMIOS timing1 1 eMIOS timing specified at f SYS = 64 MHz, VDD12 = 1.14 V to 1.32 V, VDDE_x = 3.0 V to 5.5 V, TA = -40 to 105 °C, and CL = 50 pF with SRC = 0b00. Num Symbol C Characteristic Min. value2 2 There is no limitation on the peripheral for setting the minimum pulse width, the actual width is restricted by the pad delays. Refer to the pad specification section for the details. Max. value Unit SpecID 1tMIPW CC3 3 Parameter values guaranteed by design. D eMIOS Input Pulse Width 4 — tCYC A8.1 2tMOPW CC3 D eMIOS Output Pulse Width 1 — tCYC A8.2 1,2 3 1,2 |
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