4

3

2

3

1

2

7

6

+

OPA350

To VREF Pin on

the DDC264

+5V

+5V

0.10 F

m

0.10 F

m

0.47 F

m

REF3040

1kW

0.7W

47 F

m

100mF

(1)

0.7W

10 F

m

(1)

Near Each DDC

DDC264

www.ti.com

SBAS368C

– MAY 2006 – REVISED JULY 2011

Integration Capacitors

amount of charge needed by the A/D converter is

independent

of

the

integration

time;

therefore,

There are four different capacitor configurations

increasing the integration time lowers the average

available on-chip for both sides of every channel in

current. For example, an integration time of 800

μs

the DDC264. These internal capacitors are trimmed

lowers the average VREF current to 340

μA.

in production to achieve the specified performance for

range error of the DDC264. The range control bits

It is critical that VREF be stable during the different

(Range[1:0]) set the capacitor value for all integrators.

modes of operation (see Figure 22). The A/D

Consequently, all inputs and both sides of each input

converter measures the voltage on the integrator with

always have the same full-scale range. Table 2

respect to VREF. Because the integrator capacitors

shows the capacitor value selected for each range

are initially reset to VREF, any drop in VREF from the

selection.

time the capacitors are reset to the time when the

converter measures the integrator output introduces

Table 2. Range Selection

an offset. It is also important that VREF be stable

over longer periods of time because changes in

RANGE CONTROL BITS

INPUT

RANGE

VREF correspond directly to changes in the full-scale

RANGE

Range[1]

Range[0]

range. Finally, VREF should introduce as little

–0.04 to

additional noise as possible.

0

0

0

3pF

12.5pC

–0.2 to

For these reasons, it is strongly recommended that

1

0

1

12.5pF

50.0pC

the external reference source be buffered with an

–0.4 to

operational amplifier, as shown in Figure 23. In this

2

1

0

25pF

100pC

circuit, the voltage reference is generated by a

–0.6 to

3

1

1

37.5pF

+4.096V reference. A low-pass filter to reduce noise

150pC

connects the reference to an operational amplifier

configured as a buffer. This amplifier should have low

Voltage Reference

noise and input/output common-mode ranges that

support VREF. Even though the circuit in Figure 23

The external voltage reference is used to reset the

might appear to be unstable because of the large

integration capacitors before an integration cycle

output capacitors, it works well for the OPA350. It is

begins. It is also used by the A/D converter while the

not recommended that series resistance be placed in

converter is measuring the voltage stored on the

the output lead to improve stability because this can

integrators after an integration cycle ends. During this

cause a drop in VREF, which produces large offsets.

sampling, the external reference must supply the

charge needed by the A/D converter. For an

integration time of 333

μs, this charge translates to an

average VREF current of approximately 825

μA. The

(1)

Ceramic X5R capacitors are recommended.

Figure 23. Recommended External Voltage Reference Circuit for Best Low-Noise Operation

Copyright

© 2006–2011, Texas Instruments Incorporated

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