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SN8P1602 Datasheet(PDF) 42 Page - SONiX Technology Company |
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SN8P1602 Datasheet(HTML) 42 Page - SONiX Technology Company |
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42 / 94 page  SN8P1600 8-bit micro-controller SONiX TECHNOLOGY CO., LTD Page 42 Revision 1.94 OSCM REGISTER DESCRIPTION The OSCM register is an oscillator control register. It controls oscillator selection, system mode, watchdog timer clock rate. 0CAH Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 OSCM 0 WDRST 0 0 CPUM0 CLKMD STPHX 0 Read/Write - R/W - - R/W R/W R/W - After reset - 0 - - 0 0 0 - STPHX: Eternal high-speed oscillator control bit. 0 = free run, 1 = stop. This bit only controls external high-speed oscillator. If STPHX=1, the internal low-speed RC oscillator is still running. CLKMD: System high/Low speed mode select bit. 0 = normal (dual) mode, 1 = slow mode. CPUM0: CPU operating mode control bit. 0 = normal, 1 = sleep (power down) mode to turn off both high/low clock. WDRST is watchdog timer control bits. The detail information is in watchdog timer chapter. Note: The bit 0, 4, 7 of OSCM register must be “0”, or the system will be error. |
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