SN8P1602A datasheet(51/76 Pages) SONIX

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SN8P1602B

8-Bit Micro-Controller

SONiX TECHNOLOGY CO., LTD

Page 51

Version 1.1

TC0M MODE REGISTER

The TC0M is an 8-bit read/write timer mode register. By loading different value into the TC0M register, users can

modify the timer period as program executing.

Eight rates for TC0 timer can be selected by TC0RATE0 ~ TC0RATE2 bits. The range is from fcpu/2 to fcpu/256. The

TC0M initial value is zero and the rate is fcpu/256. The bit7 of TC0M called TC0ENB is the control bit to start TC0 timer.

The combination of these bits is to determine the TC0 timer clock frequency and the intervals.

0DAH

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

TC0M

TC0ENB

TC0rate2

TC0rate1

TC0rate0

TC0CKS

Read/Write

R/W

After reset

TC0ENB: TC0 counter enable bit. “0” = disable, “1” = enable.

TC0RATE2~TC0RATE0: TC0 internal clock select bits. 000 = fcpu/256, 001 = fcpu/128, … , 110 = fcpu/4, 111 =

fcpu/2.

TC0CKS: TC0 clock source select bit. 0 = Fcpu, 1 = External clock comes from INT0/P0.0 pin.

Note1: The ICE S8KC does not support the PWM0OUT and TC0OUT Function. The PWM0OUT and

TC0OUT must use the S8KD ICE (or later) to verify the function.

Note2: When TC0CKS=1, TC0 became an external event counter. No more P0.0 interrupt request will be

raised. (P0.0IRQ will be always 0)

SN8P1602A Datasheet(PDF) 51 Page - SONiX Technology Company